Re: [PATCH v7 0/5] riscv: Add Ssqosid and initial CBQRI resctrl support

[Chen Pei]

> This series adds initial RISC-V QoS support: the Ssqosid extension [1]
> (srmcfg CSR), the CBQRI controller interface [2] integrated with resctrl
> [3], and a DT-based platform driver for cache controllers. It has been
> tested on both the Tenstorrent Ascalon Shared Cache controller and a QEMU
> implementation [4].

Hi Drew,

I picked up this series for testing as promised. I exercised it on both
QEMU (using the riscv.cbqri.capacity device from your branch [4]) and on
real FPGA hardware with a CBQRI capacity controller, and behavior and
functionality look good on both.

What I verified:

  - Mounting resctrl and reading the default schemata (CBM reflects the
    controller's capacity blocks).
  - Creating control groups, writing a narrower CBM to schemata and reading
    it back; the value matches what was written.
  - Assigning tasks to control groups, with the RCID taking effect via
    srmcfg on schedule-in.
  - The CBQRI capacity-controller block-mask limit actually constraining
    cache capacity allocation.

No functional issues observed.

For full disclosure, this was a general functional pass over the main
resctrl operations to confirm the controls take effect, rather than
exhaustive or corner-case testing.

Tested-by: Chen Pei <cp0613@xxxxxxxxxxxxxxxxx>

Best regards,
Pei