Re: [PATCH] spi: axi-spi-engine: fix stale SYNC IRQ pending
From: Mark Brown
Date: Thu Sep 03 2026 - 13:55:38 EST
On Thu, Sep 03, 2026 at 10:49:22AM -0300, Jonathan Santos wrote:
> spi_engine_setup() sends a SYNC(1) command and polls SYNC_ID to confirm
> it was parsed by the FPGA, but never clears the corresponding interrupt
> pending bit (INT_PENDING[SYNC]). When the first real SPI transfer starts
> + /* Clear the stale SYNC pending bit so it doesn't fire when the IRQ is later enabled */
> + writel_relaxed(SPI_ENGINE_INT_SYNC, spi_engine->base + SPI_ENGINE_REG_INT_PENDING);
Is there something later which posts the write?
Attachment:
signature.asc
Description: PGP signature