[PATCH 1/2] drm/msm: fix typos in comments

[Hemanth Selam]

Fix typos in comments, reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt.  Only touches comments, no code
changes.

Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@xxxxxxxxx>
---
 drivers/gpu/drm/msm/adreno/a5xx_power.c     | 2 +-
 drivers/gpu/drm/msm/adreno/adreno_gpu.c     | 2 +-
 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c  | 2 +-
 drivers/gpu/drm/msm/dsi/dsi.c               | 2 +-
 drivers/gpu/drm/msm/dsi/dsi_manager.c       | 2 +-
 drivers/gpu/drm/msm/msm_gem.h               | 2 +-
 drivers/gpu/drm/msm/msm_ringbuffer.h        | 2 +-
 drivers/gpu/drm/msm/registers/gen_header.py | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c
index d6da7351cfbb..95f432de2bcc 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
@@ -8,7 +8,7 @@
 /*
  * The GPMU data block is a block of shared registers that can be used to
  * communicate back and forth. These "registers" are by convention with the GPMU
- * firwmare and not bound to any specific hardware design
+ * firmware and not bound to any specific hardware design
  */
 
 #define AGC_INIT_BASE REG_A5XX_GPMU_DATA_RAM_BASE
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 8cd2020d4b7e..667ed411076d 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -518,7 +518,7 @@ int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,
 			return UERR(EINVAL, drm, "requires per-process pgtables");
 
 		/*
-		 * We can only swtich to VM_BIND mode if the VM has not yet
+		 * We can only switch to VM_BIND mode if the VM has not yet
 		 * been created:
 		 */
 		if (ctx->vm)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
index 841f444a8d68..cb9606c21ba2 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
@@ -245,7 +245,7 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state,
 			new_hwpipe = true;
 
 		/*
-		 * (re)allocte hw pipe if we're either requesting for 2 hw pipes
+		 * (re)allocate hw pipe if we're either requesting for 2 hw pipes
 		 * or we're switching from 2 hw pipes to 1 hw pipe because the
 		 * new src_w can be supported by 1 hw pipe itself.
 		 */
diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c
index 3c9f01ed6271..1a1a59151e5c 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.c
+++ b/drivers/gpu/drm/msm/dsi/dsi.c
@@ -246,7 +246,7 @@ int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
 	if (msm_dsi_is_bonded_dsi(msm_dsi) &&
 	    !msm_dsi_is_master_dsi(msm_dsi)) {
 		/*
-		 * Do not return an eror here,
+		 * Do not return an error here,
 		 * Just skip creating encoder/connector for the slave-DSI.
 		 */
 		return 0;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index 959daa88b1d0..36c7ae94b1c8 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -347,7 +347,7 @@ static void dsi_mgr_bridge_post_disable(struct drm_bridge *bridge,
 	/*
 	 * Do nothing with the host if it is slave-DSI in case of bonded DSI.
 	 * It is safe to call dsi_mgr_phy_disable() here because a single PHY
-	 * won't be diabled until both PHYs request disable.
+	 * won't be disabled until both PHYs request disable.
 	 */
 	if (is_bonded_dsi && !IS_MASTER_DSI_LINK(id))
 		goto disable_phy;
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index dff60cbc9d95..a8e983b243b8 100644
--- a/drivers/gpu/drm/msm/msm_gem.h
+++ b/drivers/gpu/drm/msm/msm_gem.h
@@ -346,7 +346,7 @@ msm_gem_unlock(struct drm_gem_object *obj)
 
 /**
  * msm_gem_lock_vm_and_obj() - Helper to lock an obj + VM
- * @exec: the exec context helper which will be initalized
+ * @exec: the exec context helper which will be initialized
  * @obj: the GEM object to lock
  * @vm: the VM to lock
  *
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h
index 3631ec283c6e..486280ca478e 100644
--- a/drivers/gpu/drm/msm/msm_ringbuffer.h
+++ b/drivers/gpu/drm/msm/msm_ringbuffer.h
@@ -101,7 +101,7 @@ struct msm_ringbuffer {
 
 	/*
 	 * preempt_lock protects preemption and serializes wptr updates against
-	 * preemption.  Can be aquired from irq context.
+	 * preemption.  Can be acquired from irq context.
 	 */
 	spinlock_t preempt_lock;
 
diff --git a/drivers/gpu/drm/msm/registers/gen_header.py b/drivers/gpu/drm/msm/registers/gen_header.py
index d3b56a9d84fb..d6bfb7b7d7b3 100644
--- a/drivers/gpu/drm/msm/registers/gen_header.py
+++ b/drivers/gpu/drm/msm/registers/gen_header.py
@@ -576,7 +576,7 @@ class Parser(object):
             raise self.error(e)
 
     def parse_varset(self, attrs):
-        # Inherit the varset from the enclosing domain if not overriden:
+        # Inherit the varset from the enclosing domain if not overridden:
         varset = self.current_varset
         if "varset" in attrs:
             varset = self.enums[attrs["varset"]]
-- 
2.48.1