[PATCH v3 03/19] dt-bindings: mfd: Add starfive,jh7110-hdmi-subsystem

From: Michal Wilczynski

Date: Fri Sep 04 2026 - 10:00:17 EST


Add the dt-binding for the StarFive JH7110 HDMI subsystem.

The JH7110 HDMI IP is a monolithic block containing both the digital
controller and analog PHY in a single register space. This binding
defines the parent device, which holds the shared register map and
populates its two children: the PHY and the controller. This is
necessary to resolve a circular clock dependency between the HDMI block
and the VOUT clock generator.

Signed-off-by: Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>
---
.../mfd/starfive,jh7110-hdmi-subsystem.yaml | 95 ++++++++++++++++++++++
1 file changed, 95 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/starfive,jh7110-hdmi-subsystem.yaml b/Documentation/devicetree/bindings/mfd/starfive,jh7110-hdmi-subsystem.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..bd35f191835a690e9754caa1084e2bee9b0b472b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/starfive,jh7110-hdmi-subsystem.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/starfive,jh7110-hdmi-subsystem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 HDMI subsystem
+
+maintainers:
+ - Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>
+
+description:
+ The StarFive JH7110 HDMI block is a monolithic IP containing both
+ the digital controller logic and the analog PHY logic in a single
+ register space. It sits inside the video output subsystem, which owns
+ the NoC bus clock and reset gating this region and the power domain it
+ belongs to.
+
+properties:
+ compatible:
+ const: starfive,jh7110-hdmi-subsystem
+
+ reg:
+ maxItems: 1
+
+ phy:
+ $ref: /schemas/phy/starfive,jh7110-inno-hdmi-phy.yaml#
+
+ controller:
+ $ref: /schemas/display/bridge/starfive,jh7110-inno-hdmi-controller.yaml#
+
+required:
+ - compatible
+ - reg
+ - phy
+ - controller
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/starfive,jh7110-crg.h>
+ #include <dt-bindings/reset/starfive,jh7110-crg.h>
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ hdmi@29590000 {
+ compatible = "starfive,jh7110-hdmi-subsystem";
+ reg = <0x29590000 0x4000>;
+
+ controller {
+ compatible = "starfive,jh7110-inno-hdmi-controller";
+ clocks = <&voutcrg JH7110_VOUTCLK_HDMI_TX_SYS>,
+ <&voutcrg JH7110_VOUTCLK_HDMI_TX_MCLK>,
+ <&voutcrg JH7110_VOUTCLK_HDMI_TX_BCLK>,
+ <&hdmi_phy>;
+ clock-names = "pclk", "mclk", "bclk", "pixel";
+ interrupts = <99>;
+ phys = <&hdmi_phy>;
+ resets = <&voutcrg JH7110_VOUTRST_HDMI_TX_HDMI>;
+ starfive,vout-syscon = <&vout_syscon>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ endpoint {
+ remote-endpoint = <&dpu_out_dpi0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+ };
+ };
+ };
+
+ hdmi_phy: phy {
+ compatible = "starfive,jh7110-inno-hdmi-phy";
+ clocks = <&xin24m>;
+ #clock-cells = <0>;
+ #phy-cells = <0>;
+ };
+ };
+ };
+...

--
2.34.1