Re: [PATCH net-next v2 1/2] net: phy: realtek: use C45 for RTL8365MB-VC internal PHY MMD access

[Luiz Angelo Daros de Luca]

> The RTL8365MB-VC PHYs are integrated into the switch and have no MMD
> registers of their own. What phylib accesses as MMD registers (EEE)
> actually lives in the switch's OCP registers; the realtek DSA driver maps
> those MMD requests onto OCP and exposes them over C45.
>
> For a C22 PHY, phy_read_mmd()/phy_write_mmd() would use C22 indirect-MMD,
> which this hardware does not implement. Point .read_mmd/.write_mmd at
> genphy_{read,write}_mmd_c45() so phylib's MMD accesses go over C45 to the
> DSA driver's mapping instead.
>
> Signed-off-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
> Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
> ---
> Anticipated reviewer questions:
>
> Q: .read_mmd/.write_mmd now use the C45 helpers, but the DSA user MDIO bus
>    only gains .read_c45/.write_c45 in the next patch -- is this bisect-broken?
> A: No. Until then an MMD access returns -EOPNOTSUPP, but the only one that runs
>    is the EEE-ability read in phy_probe(), which phylib ignores; probe, link and
>    traffic are unaffected. ethtool --show-eee reports EEE unsupported here -- the
>    same as before this series, since these ports gain EEE only in the next patch
>    -- so it is not a regression. Verified on an RTL8365MB-VC.

I was going to do exactly that test but you saved me some time. Thanks.

Reviewed-by: Luiz Angelo Daros de Luca <luizluca@xxxxxxxxx>