Re: [PATCH v3 0/13] KVM: x86/xen: Bug fixes and long_mode cleanup

[Paolo Bonzini]

On Mon, Aug 31, 2026 at 11:36 PM David Woodhouse <dwmw2@xxxxxxxxxxxxx> wrote:
>
> Clean up the handling of vcpu->arch.xen.long_mode to be consistent and
> correctly handle 32-bit/64-bit alignment. And various other bug fixes
> that have accumulated over the months since v1.

Applied to kvm/next, thanks.

Paolo

> v3:
>  - Rebase onto kvm/next (7.3 merge window).
>  - Add poll_evtchn READ_ONCE/WRITE_ONCE annotation (Chengfeng Ye).
>  - Add evtchn_ports IDR to XArray conversion (Furkan Caliskan).
>
> v2: https://lore.kernel.org/all/20260811094829.98794-1-dwmw2@xxxxxxxxxxxxx/
>  - Take kvm->srcu in __kvm_xen_has_interrupt().
>  - Add dedicated invalidation sequence for HVA-based caches.
>  - Take Sean's version of the 32-bit atomics patch, and his follow-up
>    replacing the remaining asm blobs with atomic*() APIs.
>  - Use GEN_BINARY_RMWcc() rather than open-coding the btsl.
>  - Explain why the pending_bits access in kvm_xen_set_evtchn_fast() does
>    not need the same treatment as the vcpu_info one (it is in the page
>    aligned per-VM shared_info).
>  - Don't require 8-byte alignment of vcpu_info in 64-bit mode; always
>    accept 4-byte alignment, so as not to break migration of guests which
>    registered while in 32-bit mode.
>  - Add Closes: links for the reported issues.
>  - Cast to u64 before the >> 32 in the unaligned evtchn_pending_sel
>    handling; evtchn_pending_sel is unsigned long, so the shift was
>    undefined on 32-bit even though the branch is unreachable there
>    (kernel test robot).
>  - Rebase onto kvm-x86/next; the mode-aware kvm_<reg>_read() helpers which
>    landed in the meantime subsume most of what patch 1 was doing by hand.
>
> v1: https://lore.kernel.org/all/20260605143034.3603-1-dwmw2@xxxxxxxxxxxxx/
>
> Chengfeng Ye (1):
>       KVM: x86/xen: Mark poll_evtchn accesses with READ_ONCE()/WRITE_ONCE()
>
> David Woodhouse (8):
>       KVM: x86/xen: Rename 'longmode' to 'is_64bit' in hypercall handling
>       KVM: x86/xen: Introduce kvm_xen_has_64bit_shinfo() macro
>       KVM: x86/xen: Rename max_evtchn_port() to kvm_max_evtchn_port()
>       KVM: x86/xen: Latch shinfo mode in kvm_xen_schedop_poll()
>       KVM: x86/xen: Enforce 4-byte alignment of vcpu_info registration
>       KVM: x86/xen: Use 32-bit locked bts for vcpu_info evtchn_pending_sel
>       KVM: x86/xen: Take kvm->srcu in __kvm_xen_has_interrupt()
>       KVM: pfncache: use a dedicated invalidation sequence for cache refresh
>
> Furkan Caliskan (1):
>       KVM: x86/xen: Convert evtchn_ports from IDR to XArray
>
> Hyunwoo Kim (1):
>       KVM: x86/xen: Latch shinfo mode in kvm_xen_set_evtchn_fast()
>
> Sean Christopherson (2):
>       KVM: x86/xen: Use 32-bit atomics if vCPU's evtchn_pending_sel isn't aligned
>       KVM: x86/xen: Use atomic*() APIs instead of open coded equivalents
>
>  arch/x86/include/asm/kvm_host.h |   3 +-
>  arch/x86/kvm/xen.c              | 212 ++++++++++++++++++++++++----------------
>  arch/x86/kvm/xen.h              |   5 +
>  include/linux/kvm_host.h        |   2 +
>  virt/kvm/kvm_main.c             |  10 ++
>  virt/kvm/pfncache.c             |  18 ++--
>  6 files changed, 157 insertions(+), 93 deletions(-)
>