[PATCH 0/2] arm64: Make write_sysreg_s() select XZR reliably

[Sascha Bischoff]

Hi all,

Sashiko spotted the original tools-side CDEOI encoding issue while
reviewing the GICv5 KVM IRS series [1]. While updating the tools copy to
match the kernel header, I noticed that the existing kernel workaround
relies on constant propagation to recognise that its local value was
initialised with zero. With optimisation disabled, compilers instead
select an arbitrary general-purpose register.

Compiling the kernel or tools without optimisation is uncommon, but the
fix is small and removes this dependency entirely.

This matters for instructions such as GIC CDEOI, where Rt must select
XZR rather than a register containing zero. Patch 1 removes the
reliance on constant propagation and instead tests the macro argument
directly. Patch 2 mirrors the change in the tools copy, fixing the
GICv5 KVM selftest.

After these changes, both GCC and LLVM emit the correct encoding when
using -O0.

[1] https://lore.kernel.org/r/20260807173928.3F6731F000E9@xxxxxxxxxxxxxxx

Thanks,
Sascha

Sascha Bischoff (2):
  arm64: sysreg: Make write_sysreg_s() select XZR without optimisation
  arm64: tools: Fix GIC CDEOI instruction encoding

 arch/arm64/include/asm/sysreg.h       |  2 +-
 tools/arch/arm64/include/asm/sysreg.h | 11 ++++++++++-
 2 files changed, 11 insertions(+), 2 deletions(-)

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2.34.1