Re: Interrupt chip driver maintainence

[Anup Patel]

On Fri, Sep 4, 2026 at 8:19 PM Thomas Gleixner <tglx@xxxxxxxxxx> wrote:
>
> Folks!
>
> I'm wading through my inbox full of patches for interrupt chip drivers
> and I'm thoroughly annoyed. The way how this works today is not
> sustainable.
>
> Patches end up in my and Radu's inbox and all we can do is go through
> them mostly on a formal basis, but it's out of our scope to look at the
> correctness vs. a particular hardware. In the past I just picked up
> patches when I had the gut feeling they are remotely correct, but I'm
> tired of this.
>
> I've just marked about 20 patches and patch series obsolete due to zero
> feedback from the relevant architecture/SoC people who were on Cc.
>
> And I'm going to do that from now on very consequently. If the
> architecture, SoC experts can't be bothered to look after their stuff,
> then don't expect me to suck all of this crap up and then deal with the
> complaints when it breaks.
>
> I'm still going to pick up obvious and simple bug fixes, but for
> anything which requires deep knowledge on the underlying hardware, I'm
> going to just mark them obsolete when they molded in my inbox unreviewed
> by the people who understand it for six weeks.
>

I think this is a fair ask.

Currently, I am focused on reviewing and testing anything which
touches RISC-V AIA drivers. The SiFive PLIC driver on other hand
seems to have no active reivewers from RISC-V space. Few years
back I did try to actively review SiFive PLIC driver but these days
I don't have bandwidth for that.

Regards,
Anup