[PATCH] mmc: sdhci-pci-gli: Fail runtime resume on PLL timeout
From: Pengpeng Hou
Date: Sat Sep 05 2026 - 23:41:08 EST
gl9763e_runtime_resume() logs when the internal clock never becomes
stable but still enables the card clock and reports runtime-resume
success.
Return the poll timeout before enabling the card clock. Clear the
PLL-enable bit so a failed resume leaves the clock state matching runtime
suspend. Low-power negotiation remains enabled for the suspended device.
The issue was found by our static-analysis tool and manually reviewed.
Fixes: d607667bb8fa ("mmc: sdhci-pci-gli: Add runtime PM for GL9763E")
Assisted-by: gpt 5
Signed-off-by: Pengpeng Hou <hppiscas@xxxxxxx>
---
drivers/mmc/host/sdhci-pci-gli.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index b55618566d65..17717b54e08c 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -1888,6 +1888,7 @@ static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
struct sdhci_pci_slot *slot = chip->slots[0];
struct sdhci_host *host = slot->host;
u16 clock;
+ int ret;
if (host->mmc->ios.power_mode != MMC_POWER_ON)
return 0;
@@ -1899,11 +1900,18 @@ static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
/* Wait max 150 ms */
- if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
- 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
+ ret = read_poll_timeout(sdhci_readw, clock,
+ (clock & SDHCI_CLOCK_INT_STABLE),
+ 1000, 150000, false, host,
+ SDHCI_CLOCK_CONTROL);
+ if (ret) {
pr_err("%s: PLL clock never stabilised.\n",
mmc_hostname(host->mmc));
sdhci_dumpregs(host);
+
+ clock &= ~SDHCI_CLOCK_PLL_EN;
+ sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+ return ret;
}
clock |= SDHCI_CLOCK_CARD_EN;
--
2.50.1 (Apple Git-155)