Re: [PATCH v1 08/13] dt-bindings: iio: adc: adi,ad4134: Document SPI connection mode
From: Jonathan Cameron
Date: Sun Sep 06 2026 - 15:15:32 EST
On Fri, 4 Sep 2026 17:47:56 -0300
Marcelo Schmitt <marcelo.schmitt1@xxxxxxxxx> wrote:
> On 09/03, Conor Dooley wrote:
> > On Wed, Sep 02, 2026 at 02:24:02PM -0300, Marcelo Schmitt wrote:
> > > Document how AD4134 chips are connected to the host SPI controller
> > > according to different wiring configurations.
> > >
> > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@xxxxxxxxxx>
> > > ---
> > > .../bindings/iio/adc/adi,ad4134.yaml | 22 +++++++++++++++++++
> > > 1 file changed, 22 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > index ea6d7e026419..d843c02a394a 100644
> > > --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > @@ -131,6 +131,28 @@ properties:
> > > enum: [ free-running, gated ]
> > > default: gated
> > >
> > > + adi,spi-mode:
> > > + $ref: /schemas/types.yaml#/definitions/string
> > > + enum: [ no-cs, 4-wire, one-channel-chain, two-channel-chain ]
> > > + description: |
> > > + This property indicates the SPI wiring configuration.
> > > +
> > > + When this property is omitted, it is assumed that the device is using
> > > + 'no-cs' wiring. When this property is present, it indicates that the
> > > + device is using one of the following wiring configurations:
> >
> ...
> > I'd also really appreciate a dts example for a system
> > with one-channel-chain or two-channel-chain looks, given the second
> > device may require different supplies etc. I have no impression in my
> > head of how the dt would be constructed, so I'd like to see wht you have
> > in mind.
>
> I've added the daisy-chain modes for completeness. It has the same semantics of
> ad7944 (daisy-)chain, despite the wiring being different. It looks like the
> supplies for the chained devices are simply assumed to be there (unless I'm
> missing something?).
I think the only cases we ever had of this in the past either used always
on supplies or shared them. That is a bit of an annoying limitation so if
we can work around that it would be good.
> Though, now that I'm checking how to configure AD4134
> for daisy-chain, I'm not sure how we could set them in dt. For 3 devices,
> we would have
>
> spi {
> ...
> adc@0 {
> compatible = "adi,ad4134";
> reg = <0>;
> spi-rx-bus-width = <1>, <1>; /* 2 lanes of 1 bit each */
>
> <supplies, clock, and other properties ...>
>
> #daisy-chained-devices = <2>;
>
> adi,spi-mode = "4-wire";
> };
> };
>
> But, the peripheral needs a register write to set the DOUT lines to 2-line
> daisy-chain and it doesn't seem to have register access propagation. So, we
> would need
That lack of register access propagation I think is the difference here from
devices we have supported chaining on in the past. To me it sounds fairly
fundamental to any generic solution.
>
> spi {
> ...
> adc@0 {
> compatible = "adi,ad4134";
> spi-rx-bus-width = <1>, <1>; /* 2 lanes of 1 bit each */
>
> <supplies, clock, and other properties ...>
>
> #daisy-chained-devices = <2>;
>
> adi,spi-mode = "4-wire";
> };
> adc@1 {
> compatible = "adi,ad4134";
> <supplies, clock, and other properties ...>
>
> adi,spi-mode = "4-wire";
> };
> adc@2 {
> compatible = "adi,ad4134";
> <supplies, clock, and other properties ...>
>
> adi,spi-mode = "4-wire";
> };
> };
> with adc@1 and adc@2 only set for register access. Even if not a dt-doc issue,
> that might (probably) lead to interface issues. The top of the daisy-chain may
> want to read from the other ADCs, but those could also be requested by IIO sysfs
> operations.
I think this bit you rewrite in next mail so I'll ignore.
>
> >
> > > +
> > > + * no-cs: The datasheet calls this "minimum I/O mode". In this mode, the CS
> > > + line is not used (tied to GND).
> > > + * 4-wire: Specifies a conventional SPI wiring configuration.
> > > + * one-channel-chain: In this mode, the DOUT0 line of one chip is connected
> > > + to DOUT2 of the next chip upstream in the chain. Only the data interface
> > > + of the upmost device in the stream is in direct connection with the
> > > + digital host.
> > > + * two-channel-chain: In this mode, the DOUT0 and DOUT1 lines of one chip
> > > + are respectively connected to DOUT2 and DOUT3 of the next chip upstream
> > > + in the chain. Only the data interface of the upmost device in the stream
> > > + is in direct connection with the digital host.
> > > +
>
> With best regards,
> Marcelo