Re: [PATCH v4 1/3] dt-bindings: phy: airoha: Document support for AN7583 USB PHY

[Krzysztof Kozlowski]

On Tue, Sep 01, 2026 at 02:39:31PM +0200, Christian Marangi wrote:
> Add documentation for Airoha AN7583 USB PHY that describe the USB PHY
> for the USB controller.
> 
> Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is
> always supported. The USB 3.0 mode is optional and depends on the Serdes
> mode currently configured on the system for the relevant USB port.
> 
> To correctly calibrate, the USB 2.0 port require correct value in
> "airoha,usb2-monitor-clk-sel" property. Both the 2 USB 2.0 port permit
> selecting one of the 4 monitor clock for calibration (internal clock not
> exposed to the system) but each port have only one of the 4 actually
> connected in HW hence the correct value needs to be specified in DT
> based on board and the physical port. Normally it's monitor clock 1 for
> USB1 and monitor clock 2 for USB2.
> 
> To correctly setup the Serdes mode attached to the USB 3.0 mode, a phys
> property is required with the phandle pointing to the correct Serdes port
> provided by the SCU node. Providing the phys property is optional if USB
> 3.0 is not used.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> ---
>  .../bindings/phy/airoha,an7583-usb-phy.yaml   | 133 ++++++++++++++++++
>  1 file changed, 133 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
> new file mode 100644
> index 000000000000..f1a5d83e8968
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
> @@ -0,0 +1,133 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/airoha,an7583-usb-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha AN7583 SoC USB PHY
> +
> +maintainers:
> +  - Christian Marangi <ansuelsmth@xxxxxxxxx>
> +
> +description: >
> +  The Airoha AN7583 SoC USB PHY describes the USB PHY for the USB controller..
> +
> +  Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is
> +  always supported. The USB 3.0 mode is optional and depends on the Serdes
> +  mode currently configured on the system for the relevant USB port.
> +
> +  On Airoha AN7583 there is an unified PHY implementation where a single
> +  PHY provide support for both the 2 USB 2.0 port and
> +  optionally one 3.0 USB.
> +
> +properties:
> +  compatible:
> +    const: airoha,an7583-usb-phy
> +
> +  reg:
> +    items:
> +      - description: phy register
> +      - description: ana register
> +      - description: pma register
> +      - description: dig register

"registers"

> +
> +  reg-names:
> +    items:
> +      - const: phy
> +      - const: ana
> +      - const: pma
> +      - const: dig
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 0
> +
> +  usb3-phy:
> +    type: object
> +
> +    properties:
> +      phys:
> +        items:
> +          - description: phandle to Serdes PHY
> +
> +      '#phy-cells':
> +        description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3,
> +          as defined in dt-bindings/phy/phy.h.
> +        const: 1
> +
> +    required:
> +      - phys
> +      - '#phy-cells'
> +
> +    additionalProperties: false
> +
> +patternProperties:
> +  '^usb2-phy@[0-9a-f]+$':

You should not mix MMIO and non-MMIO children. Either children have
distinctive addressing, or not. Not both.

The other problem is that your children have no resources, so are not
really distinctive children and should be folded in to the parent.

I already asked that at v2, so let's finish with asking: drop the
children.

Best regards,
Krzysztof