[PATCH 4/7] ASoC: mediatek: mt8188: mt8188-afe-clk: Handle clock enable errors
From: phucduc . bui
Date: Mon Sep 07 2026 - 08:15:11 EST
From: bui duc phuc <phucduc.bui@xxxxxxxxx>
Clock enable errors are currently ignored by several AFE clock
control functions.
Check the return values and roll back previously enabled clocks when
a subsequent clock enable fails.
Fixes: f6b026479b13 ("ASoC: mediatek: mt8188: support audio clock control")
Fixes: 9be0213a6858 ("ASoC: mediatek: mt8188: refine APLL control")
Signed-off-by: bui duc phuc <phucduc.bui@xxxxxxxxx>
---
sound/soc/mediatek/mt8188/mt8188-afe-clk.c | 69 ++++++++++++++++++----
1 file changed, 58 insertions(+), 11 deletions(-)
diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
index 77511f6fba41..8b6dca22c8ed 100644
--- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
+++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c
@@ -579,22 +579,47 @@ static int mt8188_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_t
int mt8188_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
{
struct mt8188_afe_private *afe_priv = afe->platform_priv;
-
+ int ret;
/* bus clock for AFE external access, like DRAM */
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]);
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]);
+ if (ret)
+ goto err_local_bus;
/* bus clock for AFE internal access, like AFE SRAM */
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]);
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]);
+ if (ret)
+ goto err_intbus;
/* audio 26m clock source */
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]);
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]);
+ if (ret)
+ goto err_26m;
/* AFE hw clock */
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]);
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]);
- mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]);
+ if (ret)
+ goto err_afe;
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]);
+ if (ret)
+ goto err_a1sys_hp;
+ ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);
+ if (ret)
+ goto err_a1sys;
return 0;
+
+err_a1sys:
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]);
+err_a1sys_hp:
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]);
+err_afe:
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]);
+err_26m:
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]);
+err_intbus:
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]);
+err_local_bus:
+ return ret;
}
int mt8188_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)
@@ -630,7 +655,13 @@ static int mt8188_afe_enable_a1sys(struct mtk_base_afe *afe)
if (ret)
return ret;
- return mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A1SYS_TIMING);
+ ret = mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A1SYS_TIMING);
+ if (ret) {
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);
+ return ret;
+ }
+
+ return 0;
}
static int mt8188_afe_disable_a1sys(struct mtk_base_afe *afe)
@@ -651,7 +682,13 @@ static int mt8188_afe_enable_a2sys(struct mtk_base_afe *afe)
if (ret)
return ret;
- return mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A2SYS_TIMING);
+ ret = mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A2SYS_TIMING);
+ if (ret) {
+ mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]);
+ return ret;
+ }
+
+ return 0;
}
static int mt8188_afe_disable_a2sys(struct mtk_base_afe *afe)
@@ -739,8 +776,18 @@ int mt8188_apll2_disable(struct mtk_base_afe *afe)
int mt8188_afe_enable_main_clock(struct mtk_base_afe *afe)
{
- mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_26M_TIMING);
- mt8188_afe_enable_afe_on(afe);
+ int ret;
+
+ ret = mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_26M_TIMING);
+ if (ret)
+ return ret;
+
+ ret = mt8188_afe_enable_afe_on(afe);
+ if (ret) {
+ mt8188_afe_disable_top_cg(afe, MT8188_TOP_CG_26M_TIMING);
+ return ret;
+ }
+
return 0;
}
--
2.43.0