Re: [PATCH v4 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding

From: Krzysztof Kozlowski

Date: Mon Sep 07 2026 - 08:36:00 EST


On 07/09/2026 13:43, Harendra Gautam wrote:
>>> + clock-names:
>>> + description:
>>> + The first five clocks are always required. Any further entries are the
>>> + per-AIF bit clocks (aif_if<N>_ibit), supplied in order starting from
>>> + AIF interface 0 for as many serial AIF interfaces as the board uses.
>>
>> Who provides these clocks? Your example DTS suggests that another SoC
>> block, so how these clocks could be optional? Either they are in the
>> hardware or they are not. Hardware is not really flexible.
> The clocks are provided by the GCC/LPASS clock controller, referenced
> via phandles in the DTS example. The distinction between required and
> optional is based on usage, not hardware presence. The 5 required
> clocks (lpass_config, lpass_core_axim, bus, dma, dma_mem) are needed
> for any register access and DMA operation, the hardware block cannot
> function without them. The per-interface bit clocks
> (aif_if0_ibit..aif_if3_ibit) are only needed when the corresponding
> AIF interface is actually used; a board may instantiate QAIF with
> fewer than 4 active interfaces, in which case the unused interface
> clocks need not be enabled. All four Shikra AIF interface clocks are
> listed in the example because Shikra has 4 physical interfaces, but
> the binding intentionally allows subsets for future SoCs or board
> configurations where not all interfaces are wired up.

If the board does not need to enable them, then driver should simply not
do that. The clocks are still there, so the clocks are required.

Best regards,
Krzysztof