Re: [PATCH 0/2] i2c: Add I2C High-Speed mode support for qcom-geni

[Jyothi Kumar Seerapu]

On 8/28/2026 12:56 AM, Mukesh Savaliya wrote:
> On 8/24/2026 4:55 PM, Jyothi Kumar Seerapu wrote:
> > Add I2C High-Speed (HS) mode support for the Qualcomm GENI I2C
> > controller, detecting HS mode requests based on a 3.4 MHz bus
> > frequency.
>
> what's the detecting here ? HS mode itself is 3.4 MHz freq.
> may be you be you can start with current support freq modes and not 
> supported.>
> > I2C HS mode is supported by the underlying QUP hardware starting with
> > QUPv3 core version 4.3 (per the GENI/QUP Hardware Programming Guide).
> > This series adds the driver support to detect that capability and
> is this detect things repeating ?> enable HS-mode transfers on SoCs 
> whose QUP core version meets that
> > requirement, rather than tying HS mode to any specific peripheral.
> >
> > Patch 1 (dmaengine: qcom-gpi) is for GPI DMA transfers and adds
> > a CONFIG1 TRE to the GPI DMA engine to convey HS-specific timing
> > parameters (tcycle_cnt/tlow_cnt) to the hardware.
> Patch 1 is to convey config parameters for HS mode in GPI DMA tranfser.
>
> > Patch 2 (i2c: qcom-geni) handles FIFO/SE-DMA transfers; It configures
> > the GENI controller's source clock and timing accordingly, and adds
> > the HS-specific FIFO/SE-DMA opcodes and master-code preamble needed
> > to switch the bus from Fast Mode Plus to HS speed.
>
> Like above just say high level in short, individual patch will add more 
> details in its commit log.
 Okay, i will add the below commit description.

The GENI I2C driver currently supports Standard (100 KHz), Fast
(400 KHz), and Fast Mode Plus (1 MHz) speeds, but not High-Speed
(HS) mode (3.4 MHz).

The underlying QUP hardware supports I2C HS mode starting with QUPv3
core version 4.3, per the GENI/QUP Hardware Programming Guide. Add
driver support to enable HS-mode transfers based on that QUP core
version.

Patch 1 (dmaengine: qcom-gpi) adds a CONFIG1 TRE to convey HS-mode
timing parameters (tcycle_cnt/tlow_cnt) for GPI DMA transfers.

Patch 2 (i2c: qcom-geni) adds HS-mode support for FIFO/SE-DMA
transfers, including the required clock/timing configuration and
master-code preamble.

> > Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@xxxxxxxxxxxxxxxx>
> > ---
> > Jyothi Kumar Seerapu (2):
> >        dmaengine: qcom-gpi: Add I2C High-Speed mode configuration support
> >        i2c: qcom-geni: Add support for I2C High-Speed mode
> >
> >   drivers/dma/qcom/gpi.c             |  54 +++++++++++++--
> >   drivers/i2c/busses/i2c-qcom-geni.c | 133 +++++++++++++++++++++++++++ 
> > ++++++----
> >   include/linux/dma/qcom-gpi-dma.h   |  28 +++++++-
> >   3 files changed, 196 insertions(+), 19 deletions(-)
> > ---
> > base-commit: 7079a12d7506b07fb53b54a664bfad5fa9b16d70
> > change-id: 20260821-i2c-hs-408768509865
> >
> > Best regards,
> > --
> > Jyothi Kumar Seerapu <jyothi.seerapu@xxxxxxxxxxxxxxxx>