Re: [PATCH v3 3/4] phy: qualcomm: qmp-combo: Update link rate specific DP PHY tables

From: Manivannan Sadhasivam

Date: Tue Sep 08 2026 - 01:43:02 EST


On Fri, Aug 28, 2026 at 03:13:15PM +0530, Nabige Aala wrote:
> From: Ritesh Kumar <ritesh.kumar@xxxxxxxxxxxxxxxx>
>
> Update DP PHY initialization tables for all link rates (RBR, HBR,
> HBR2, HBR3) with corrected VCO calibration codes, lock compare
> values, SSC step sizes, clock forward config, and bias enable
> settings for proper PLL programming across different data rates.
>
> Signed-off-by: Ritesh Kumar <ritesh.kumar@xxxxxxxxxxxxxxxx>
> Signed-off-by: Mahadevan P <mahadevan.p@xxxxxxxxxxxxxxxx>
> Signed-off-by: Nabige Aala <nabige.aala@xxxxxxxxxxxxxxxx>

Missing Fixes tag pointed out by Konrad. With that added,

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxxxxxxxx>

- Mani

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