[PATCH v4 07/13] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Assert reset on clock enable failure

[George Moussalem via B4 Relay]

From: George Moussalem <george.moussalem@xxxxxxxxxxx>

When the PHY fails the enable clocks, it leaves the PHY out of reset.
Fix this by asserting the reset before returning the error.

Tested-by: Stanislaw Pal <kuncy7@xxxxxxxxx>
Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
---
 drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c
index 0a50eb44c0ce..15b17044fde3 100644
--- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c
+++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-usb3-28lp.c
@@ -164,6 +164,7 @@ static int qcom_uniphy_pcie_power_on(struct phy *x)
 	ret = clk_bulk_prepare_enable(phy->num_clks, phy->clks);
 	if (ret) {
 		dev_err(phy->dev, "clk prepare and enable failed %d\n", ret);
+		reset_control_bulk_assert(phy->num_resets, phy->resets);
 		return ret;
 	}
 

-- 
2.53.0