[PATCH v2] KVM: x86: Rename CPUID feature bit AVX10_VNNI_INT to AVX10_V1_AUX

[Hao Xiang]

CPUID feature bit AVX10_VNNI_INT is renamed to AVX10_V1_AUX to account
for additional AVX10.2 instructions separated to have ”OR” sensitivity
for platforms which may not support all of AVX10.2[*]. This CPUID bit now
applies to the following VNNI instructions: VPDPB[SU,UU,SS]D[,S]
VPDPW[SU,US,UU]D[,S], as well as the following convert instructions:
VCVT[,2]PH2[B,H]F8[,S], VCVT2PS2PHX, VCVT-BIASPH2[B,H]F8[,S],
VCVTHF82PH.

[*]: Intel® Advanced Vector Extensions 10.2 Architecture Specification
      (rev 7.0).

Signed-off-by: Hao Xiang <hao.xiang@xxxxxxxxxxxxxxxxx>
Reviewed-by: Zhao Liu <zhao1.liu@xxxxxxxxx>
---
v1 -> v2:
  - Fix typos in commit message.
  - Change subject prefix from "i386/cpu:" to "KVM: x86:" per
    Documentation/process/maintainer-kvm-x86.rst.
  - Add Reviewed-by from Zhao Liu.

  arch/x86/kvm/cpuid.c         | 2 +-
  arch/x86/kvm/reverse_cpuid.h | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 851f151efb35..1e5bf6fff9c9 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -1095,7 +1095,7 @@ void kvm_initialize_cpu_caps(void)
      );

      kvm_cpu_cap_init(CPUID_24_1_ECX,
-        F(AVX10_VNNI_INT),
+        F(AVX10_V1_AUX),
      );

      kvm_cpu_cap_init(CPUID_8000_0001_ECX,
diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index 2ad25781cefb..89345af0f7ad 100644
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -66,7 +66,7 @@
  #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18)

  /* Intel-defined sub-features, CPUID level 0x00000024:1 (ECX) */
-#define X86_FEATURE_AVX10_VNNI_INT KVM_X86_FEATURE(CPUID_24_1_ECX, 2)
+#define X86_FEATURE_AVX10_V1_AUX KVM_X86_FEATURE(CPUID_24_1_ECX, 2)

  /* CPUID level 0x80000007 (EDX). */
  #define KVM_X86_FEATURE_CONSTANT_TSC 
KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8)
--
2.32.0.3.g01195cf9f