RE: [PATCH v4] Bluetooth: btintel_pcie: fix stale cache in set_dxstate fallback check

[K, Kiran]

+Mahalingeshwara, Ravindra

Hi Sergey,

Thanks a lot for your thorough testing, detailed analysis, and insightful
measurement data. Your Tested-by for v4 is much appreciated.

Good catch on POLL_INTERVAL_US in btintel_pcie.h. Currently, waiting for the
alive interrupt is the flow defined for all Intel Bluetooth PCIe products, as
interrupt-driven notifications are designed to avoid active polling on the
PCIe bus during state transitions.

We will discuss your observations and data internally with our Systems team to
evaluate if any adjustments can be approved for future enhancements.

Thanks again,
Kiran

>Subject: Re: [PATCH v4] Bluetooth: btintel_pcie: fix stale cache in set_dxstate
>fallback check
>
>Vladimir, Paul, Chandrashekar, Kiran,
>
>Nothing here asks for a change to v4 — it is right and my Tested-by stands. This
>is the measurement behind a question I put to the list on 2026-09-02 and
>could not support with numbers at the time.
>
>The question was whether BTINTEL_PCIE_CSR_BOOT_STAGE_REG should be
>polled for the target D-state, with the alive interrupt demoted to an early exit,
>rather than the other way round. So I timed both against the same zero — the
>write in
>btintel_pcie_wr_sleep_cntrl() — on Surface Pro 11 (Lunar Lake), Intel BE201,
>8086:a876 rev 10, kernel 7.0.0-30, s2idle. A measurement build polls the
>register every 100 us and records when bit 24 reaches the target and when
>gp0_received becomes true. Four suspend/resume cycles, eight transitions:
>
>  dxstate  register (us)              interrupt (us)
>  D3       1517  1027  1085  1111     1670  1171  1085  1112
>  D0       1630  1521  1676  1701     1630  1646  1676  1701
>
>The register reaches the target state in **1.0 to 1.7 ms** and is **never later
>than the interrupt**. In four of the eight it is the same 100 us sample; in two it
>leads by 125 and 153 us. Against that, the current path budgets 200 ms per
>attempt and three attempts — up to 600 ms per transition, twice per suspend
>cycle.
>
>That is the whole of my case, and its limits are worth stating plainly. One
>machine, one controller, one firmware. The poll itself is PCIe traffic and could
>be perturbing what it measures, though it would have to be perturbing it in the
>direction that flatters the register. And a settle time is not a guarantee: an
>interrupt exists partly so the driver need not assume a bound.
>
>But if the bound holds on Intel's own hardware, polling would delete the stale-
>cache class of bug rather than catch it, and POLL_INTERVAL_US is already
>declared in btintel_pcie.h and unused.
>
>I have not written that patch, because it is your subsystem and my coverage is
>one machine. What I do have is the hardware, a fixture that drops the alive
>interrupt on demand, and the per-hunk method already used in this thread. So
>if an RFC would be useful rather than noise, I will write one and report it the
>same way — measured per hunk, with the failure injected and with it disabled.
>If you would rather it came from someone with the full range of controllers,
>that is a perfectly good answer and I will leave it here.
>
>Sergey