[PATCH v2] arm64: dts: qcom: sc8280xp: Mark FastRPC context banks as dma-coherent
From: Xilin Wu
Date: Wed Sep 09 2026 - 04:01:47 EST
The FastRPC context banks are DMA-coherent on SC8280XP. Describe this in
the device tree so that the DMA API uses the appropriate coherency
attributes for their mappings.
When FastRPC allocates shared buffers from the system DMA heap, the
missing property can cause intermittent failures while loading DSP
libraries. Both fastrpc_test and the QAIRT platform validator can fail
with DSP loader errors such as "mmap hdrs failed" and "bad address".
Mark the ADSP and CDSP FastRPC context banks as dma-coherent to fix these
failures and allow QAIRT applications to run on the CDSP.
Signed-off-by: Xilin Wu <sophon@xxxxxxxxx>
---
Changes in v2:
- Rebased onto v7.3-rc2
- Rephrase commit message
- Link to v1: https://patch.msgid.link/20260507-sc8280xp-fastrpc-dma-coherent-v1-1-e92aed797865@xxxxxxxxx
To: Bjorn Andersson <andersson@xxxxxxxxxx>
To: Konrad Dybcio <konradybcio@xxxxxxxxxx>
To: Rob Herring <robh@xxxxxxxxxx>
To: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
To: Conor Dooley <conor+dt@xxxxxxxxxx>
Cc: linux-arm-msm@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index fbcfd3883bbb..dfe7dbaebe62 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2910,18 +2910,21 @@ compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x0521 0x0>;
+ dma-coherent;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x0522 0x0>;
+ dma-coherent;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x0523 0x0>;
+ dma-coherent;
};
};
};
@@ -6235,84 +6238,98 @@ compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x3181 0x0420>;
+ dma-coherent;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x3182 0x0420>;
+ dma-coherent;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x3183 0x0420>;
+ dma-coherent;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x3184 0x0420>;
+ dma-coherent;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x3185 0x0420>;
+ dma-coherent;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x3186 0x0420>;
+ dma-coherent;
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x3187 0x0420>;
+ dma-coherent;
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x3188 0x0420>;
+ dma-coherent;
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
iommus = <&apps_smmu 0x318b 0x0420>;
+ dma-coherent;
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <10>;
iommus = <&apps_smmu 0x318b 0x0420>;
+ dma-coherent;
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0x318c 0x0420>;
+ dma-coherent;
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x318d 0x0420>;
+ dma-coherent;
};
compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x318e 0x0420>;
+ dma-coherent;
};
compute-cb@14 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x318f 0x0420>;
+ dma-coherent;
};
};
};
---
base-commit: df2908090cda368b01ff43709f51890076c56157
change-id: 20260507-sc8280xp-fastrpc-dma-coherent-460cefa58dbb
Best regards,
--
Xilin Wu <sophon@xxxxxxxxx>