[PATCH 0/5] clk: spacemit: preserve and safely synchronize firmware PLLs

[Troy Mitchell]

Firmware may leave PLLs running with valid settings absent from Linux's
rate tables. Replacing those settings during clock registration can
stop CPUs that depend on them.

This series removes the init fallback to the first rate-table entry,
decodes hardware rates directly and preserves unlisted rates. Opt-in
synchronization applies only to differing parameters for the same
decoded rate. It temporarily moves mapped CPU consumers to validated
PLL1 branches and restores their parents after the reprogrammed PLL
locks. PLL1 itself is not synchronized, and enabled outputs outside the
managed CPU paths prevent synchronization.

The series also corrects CPU divider and shared-parent modeling and
makes MIX rate selection agree with programming. Runtime PLL rate
changes still require a stopped PLL; automatic DVFS switching and new
rate-table entries are outside this series.

---
Troy Mitchell (5):
      clk: spacemit: derive PLL rates from hardware
      clk: spacemit: make MIX rate selection consistent
      clk: spacemit: describe CPU clock dividers and shared PLL muxes
      clk: spacemit: reject rate changes to running firmware PLLs
      clk: spacemit: safely synchronize PLL parameters during init

 drivers/clk/spacemit/ccu-k1.c     |  60 +++--
 drivers/clk/spacemit/ccu-k3.c     | 137 +++++++---
 drivers/clk/spacemit/ccu_common.c |  12 +
 drivers/clk/spacemit/ccu_common.h |   2 +
 drivers/clk/spacemit/ccu_mix.c    |  35 ++-
 drivers/clk/spacemit/ccu_mix.h    |  18 ++
 drivers/clk/spacemit/ccu_pll.c    | 535 +++++++++++++++++++++++++++++++-------
 drivers/clk/spacemit/ccu_pll.h    |  43 ++-
 8 files changed, 689 insertions(+), 153 deletions(-)
---
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
change-id: 20260907-spacemit-pll-init-c942bb249244

Best regards,
--  
Troy Mitchell <troy.mitchell@xxxxxxxxxxxxxxxxxx>