[PATCH 2/5] clk: spacemit: make MIX rate selection consistent

[Troy Mitchell]

CCF passes the selected parent's rate to set_rate(). Searching other
parents at that point can produce a divider for a different source,
making the programmed rate disagree with CCF's selection.

Restrict divider selection to the supplied parent rate and use the same
rounding as divider_recalc_rate(). Track the best error separately so
low-rate requests do not leave the initial zero-Hz candidate selected.
Skip zero-rate parents and have determine_rate() reject requests when no
usable parent exists.

Fixes: 1b72c59db0ad ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Signed-off-by: Troy Mitchell <troy.mitchell@xxxxxxxxxxxxxxxxxx>
---
 drivers/clk/spacemit/ccu_mix.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/spacemit/ccu_mix.c b/drivers/clk/spacemit/ccu_mix.c
index a8b407049bf4d..da3c5685d4f65 100644
--- a/drivers/clk/spacemit/ccu_mix.c
+++ b/drivers/clk/spacemit/ccu_mix.c
@@ -107,22 +107,27 @@ ccu_mix_calc_best_rate(struct clk_hw *hw, unsigned long rate,
 	struct ccu_mix *mix = hw_to_ccu_mix(hw);
 	unsigned int parent_num = clk_hw_get_num_parents(hw);
 	struct ccu_div_config *div = &mix->div;
-	u32 div_max = 1 << div->width;
 	unsigned long best_rate = 0;
+	unsigned long best_delta = ULONG_MAX;
 
 	for (int i = 0; i < parent_num; i++) {
 		struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i);
 		unsigned long parent_rate;
+		u32 div_max = 1 << div->width;
 
 		if (!parent)
 			continue;
 
 		parent_rate = clk_hw_get_rate(parent);
+		if (!parent_rate)
+			continue;
 
 		for (int j = 1; j <= div_max; j++) {
-			unsigned long tmp = DIV_ROUND_CLOSEST_ULL(parent_rate, j);
+			unsigned long tmp = DIV_ROUND_UP_ULL(parent_rate, j);
+			unsigned long delta = abs_diff(tmp, rate);
 
-			if (abs(tmp - rate) < abs(best_rate - rate)) {
+			if (delta < best_delta) {
+				best_delta = delta;
 				best_rate = tmp;
 
 				if (div_val)
@@ -146,7 +151,7 @@ static int ccu_mix_determine_rate(struct clk_hw *hw,
 					   &req->best_parent_hw,
 					   &req->best_parent_rate,
 					   NULL);
-	return 0;
+	return req->rate ? 0 : -EINVAL;
 }
 
 static int ccu_mix_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -155,9 +160,19 @@ static int ccu_mix_set_rate(struct clk_hw *hw, unsigned long rate,
 	struct ccu_mix *mix = hw_to_ccu_mix(hw);
 	struct ccu_common *common = &mix->common;
 	struct ccu_div_config *div = &mix->div;
-	u32 current_div, target_div, mask;
+	u32 current_div, target_div = 0, mask;
+	unsigned long best_delta = ULONG_MAX;
+
+	/* set_rate must use the parent selected by CCF, not search other parents. */
+	for (u32 i = 1; i <= BIT(div->width); i++) {
+		unsigned long divided = DIV_ROUND_UP_ULL(parent_rate, i);
+		unsigned long delta = abs_diff(divided, rate);
 
-	ccu_mix_calc_best_rate(hw, rate, NULL, NULL, &target_div);
+		if (delta < best_delta) {
+			best_delta = delta;
+			target_div = i - 1;
+		}
+	}
 
 	current_div = ccu_read(common, ctrl) >> div->shift;
 	current_div &= (1 << div->width) - 1;

-- 
2.55.0