Re: [PATCH v20 11/14] KVM: selftests: arm64: Add GCS to set_id_regs
From: Leonardo Bras
Date: Wed Sep 09 2026 - 14:24:36 EST
On Tue, Sep 01, 2026 at 10:47:09PM +0100, Mark Brown wrote:
> Now that GCS is configurable via the ID registers update set_id_regs to
> cover ID_AA64PFR1_EL1.GCS.
>
> Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
> ---
> tools/testing/selftests/kvm/arm64/set_id_regs.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> index 7429a1055df5..34e59fbbbe89 100644
> --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c
> +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> @@ -154,6 +154,7 @@ static const struct reg_ftr_bits ftr_id_aa64pfr0_el1[] = {
>
> static const struct reg_ftr_bits ftr_id_aa64pfr1_el1[] = {
> REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, DF2, 0),
> + REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, GCS, 0),
> REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, CSV2_frac, 0),
> REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, SSBS, ID_AA64PFR1_EL1_SSBS_NI),
> REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, BT, 0),
Check this register for this GCS field, any value >= 0 is safe.
Used to test setting id_regs IIUC.
If that's correct, then:
Reviewed-by: Leonardo Bras <leo.bras@xxxxxxx>
Thanks,
Leo