Re: [PATCH v2 3/3] arm64: dts: qcom: sm8450: Add IPA node

From: Dmitry Baryshkov

Date: Wed Sep 09 2026 - 15:11:34 EST


On Wed, Sep 09, 2026 at 03:11:39AM +0000, Esteban Urrutia wrote:
> Add the description of the IPA block in the SM8450 SoC.
>
> Co-developed-by: Nazar Kompanets <xlie7669@xxxxxxxxx>
> Signed-off-by: Nazar Kompanets <xlie7669@xxxxxxxxx>
> Signed-off-by: Esteban Urrutia <esteuwu@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 59 +++++++++++++++++++++++++++++++-----
> 1 file changed, 52 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index b8793482b181..95b6fd22a846 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2625,6 +2625,47 @@ adreno_smmu: iommu@3da0000 {
> dma-coherent;
> };
>
> + ipa: ipa@3f40000 {
> + compatible = "qcom,sm8450-ipa";
> +
> + reg = <0 0x3f40000 0 0x10000>,
> + <0 0x3f50000 0 0x5000>,
> + <0 0x3e04000 0 0xfc000>;
> + reg-names = "ipa-reg",
> + "ipa-shared",
> + "gsi";
> + iommus = <&apps_smmu 0x5c0 0x0>,
> + <&apps_smmu 0x5c2 0x0>;
> +
> + interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
> + <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
> + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "ipa",
> + "gsi",
> + "ipa-clock-query",
> + "ipa-setup-ready";
> +
> + clocks = <&rpmhcc RPMH_IPA_CLK>;
> + clock-names = "core";
> +
> + interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
> + interconnect-names = "memory",
> + "config";
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&ipa_smp2p_out 0>,
> + <&ipa_smp2p_out 1>;
> + qcom,smem-state-names = "ipa-clock-enabled-valid",
> + "ipa-clock-enabled";
> +
> + sram = <&ipa_modem_tables>;

No qcom,gsi-loader / memory-region ?

> +
> + status = "disabled";
> + };
> +
> usb_1_hsphy: phy@88e3000 {
> compatible = "qcom,sm8450-usb-hs-phy",
> "qcom,usb-snps-hs-7nm-phy";


Also the device is disabled by default. On which platform did you enable
it? Is it supported upstream?

--
With best wishes
Dmitry