[PATCH v1 0/8] iommu/arm-smmu-v3: Support guest-level Realm VSMMU (Part-1)

From: Nicolin Chen

Date: Wed Sep 09 2026 - 23:38:56 EST


[ PATCH-1 in this series is a provisional cherry-pick from Aneesh's series
that moves the RSI layer out of arch/arm64, per Will's request. I added
it here to base the entire series on a public commit ID so that Sashiko
can start its job. So, I kept it as-is mostly, with Jason's review tag. ]

This series prepares Realm guest IOMMU and DMA subsystems for devices that
are present but not yet inside the Realm trust boundary.

Inside a confidential guest, we expect that all the iommus are going to be
T=1 aware; there seems to be no interest in supporting IOMMUs that handle
T=0 only. This means they only work on devices that have been put into the
run state and issue T=1 transactions.

Today an iommu driver assumes it translates for every device behind it: it
probes the device, takes a translating default domain, and puts the DMA API
on its page tables. That assumption is wrong for T=0 devices, whose DMA the
hypervisor translates instead, so the mappings made by the guest are never
consulted and the device silently stops working.

To solve this problem, make TDISP T=0 the default for devices associated
with a confidential IOMMU. The tdisp_t1 flag records the future T=1 state.

While T=0, the device remains outside the Realm trust boundary. Its DMA is
translated by the host or hypervisor:

[device: T=0] ===> [hypervisor] ===> [memory]
|
+-- (guest association) --> [confidential IOMMU: blocking DMA]

Legend: ===> DMA path; --> guest topology and control

After reaching T=1, the device is inside the Realm trust boundary. Its DMA
may use the guest VSMMU after RMM binds the device to its virtual stream:

[device] ===> [VSMMU: S1] ===> [RMM/PSMMU: S2 + DPT] ===> [memory]

As part 1 of Realm VSMMU support, implement enough core infrastructure to
manage a confidential vIOMMU:
- Detect and mark it as confidential in the core iommu structures
- Support devices in T=0 mode by keeping the DMA API in direct mode. The
iommu is up and running, but parks such a device in its blocking domain
and translates for nothing, as the core takes over what the device still
needs, which today is ATS
- Keep it parked: refuse a translating domain by every route in, whether
through the default domain, sysfs, group attach or replace, or PASID

Part 1 only adds the helpers required for T=0 setup and teardown. It does
not add iommu_tdisp_enter_t1() until part 2 has a transition to perform.

Then implement SMMUv3 support:
- Let a CPU-integrated IOMMU declare that its DMA can reach private
memory, so coherent allocations and streaming mappings avoid the SWIOTLB
shared pool
- Identify a T=1 VSMMU using trusted RSI because firmware does not
distinguish it from a normal T=0 SMMU
- Validate the firmware MMIO range against RSI before activating the VSMMU
and allocating its queues and tables from private memory

The series is on github:
https://github.com/nicolinc/iommufd/commits/smmuv3_realm_guest_p1-v1

Future work
===========

Part 2 will add the T=1 transition after validation through:

- TSM, whose guest-side interface remains under discussion
- RMM, using the Arm-specific RSI VDEV command

For a multi-device IOMMU group, the first device accepted into T=1 claims
the group. Part 2 will reject T=1 for every other member.

The current RSI binding validation returns one VSID, so part 2 must reject
a firmware specification containing multiple SIDs upon the T=1 transition.

Aneesh Kumar K.V (Arm) (1):
firmware: arm_rmm: Move RSI support out of arch/arm64

Nicolin Chen (7):
firmware: arm_rmm: Add VSMMU commands and fields
dma-mapping: Let a device declare that it reaches private memory
dma-mapping: Keep DMA memory private for capable devices
iommu: Let a driver mark an IOMMU as confidential
iommu: Introduce TDISP T=0 state for confidential IOMMUs
iommu: Park TDISP T=0 devices in the blocking domain
iommu/arm-smmu-v3: Probe a guest-level Realm VSMMU via RSI commands

arch/arm64/Kconfig | 1 +
drivers/firmware/Kconfig | 1 +
drivers/firmware/arm_rmm/Kconfig | 18 ++++
drivers/virt/coco/arm-cca-guest/Kconfig | 2 +-
arch/arm64/kernel/Makefile | 2 +-
drivers/firmware/Makefile | 1 +
drivers/firmware/arm_rmm/Makefile | 2 +
drivers/iommu/Makefile | 3 +
arch/arm64/include/asm/io.h | 2 +-
arch/arm64/include/asm/mem_encrypt.h | 2 +-
arch/arm64/include/asm/pgtable-prot.h | 2 +-
arch/arm64/include/asm/rsi.h | 70 -------------
drivers/iommu/iommu-priv.h | 19 ++++
.../linux/arm-rsi-cmds.h | 99 ++++++++++++++++++-
.../linux/arm-smccc-rsi.h | 26 ++++-
include/linux/device.h | 4 +
include/linux/dma-direct.h | 7 +-
include/linux/dma-mapping.h | 4 +
include/linux/iommu.h | 14 +++
arch/arm64/kernel/setup.c | 2 +-
arch/arm64/mm/init.c | 3 +-
.../kernel => drivers/firmware/arm_rmm}/rsi.c | 2 +-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 55 +++++++++++
drivers/iommu/iommu-cc.c | 57 +++++++++++
drivers/iommu/iommu.c | 86 +++++++++++++++-
.../virt/coco/arm-cca-guest/arm-cca-guest.c | 5 +-
kernel/dma/direct.c | 16 +--
kernel/dma/mapping.c | 23 ++++-
kernel/dma/swiotlb.c | 2 +-
29 files changed, 427 insertions(+), 103 deletions(-)
create mode 100644 drivers/firmware/arm_rmm/Kconfig
create mode 100644 drivers/firmware/arm_rmm/Makefile
delete mode 100644 arch/arm64/include/asm/rsi.h
rename arch/arm64/include/asm/rsi_cmds.h => include/linux/arm-rsi-cmds.h (64%)
rename arch/arm64/include/asm/rsi_smc.h => include/linux/arm-smccc-rsi.h (90%)
rename {arch/arm64/kernel => drivers/firmware/arm_rmm}/rsi.c (99%)
create mode 100644 drivers/iommu/iommu-cc.c


base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
--
2.43.0