[PATCH v5 6/8] x86/amd_nb: Restrict the northbridge framework to AMD CPUs

[Lin Wang]

amd_cache_northbridges() obtains function 3 and function 4 for node N
from fixed PCI slot 0x18 + N. Hygon DF devices are discovered by PCI
ID and their slots do not encode node identity, so this cache cannot
represent the Hygon topology.

The preceding patches remove the Hygon matches from amd64_edac and ATL.
Restrict the northbridge initialization and early device check to AMD
CPUs. Keep amd_get_mmconfig_range() available on Hygon because it reads
the MMCONFIG MSR without using the northbridge cache.

Reviewed-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
Signed-off-by: Lin Wang <wanglin@xxxxxxxxxxxxxx>
---
 arch/x86/kernel/amd_nb.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 5d364540673d..848ed2ca17c3 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -125,8 +125,7 @@ bool __init early_is_amd_nb(u32 device)
 	const struct pci_device_id *id;
 	u32 vendor = device & 0xffff;
 
-	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
-	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
 		return false;
 
 	if (cpu_feature_enabled(X86_FEATURE_ZEN))
@@ -315,8 +314,7 @@ static __init void fix_erratum_688(void)
 
 static __init int init_amd_nbs(void)
 {
-	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
-	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
 		return 0;
 
 	amd_cache_northbridges();
-- 
2.43.0