Re: [PATCH v6 11/13] serial: 8250_dw: add Ambarella CV75 quirks
From: Andy Shevchenko
Date: Thu Sep 10 2026 - 04:43:19 EST
On Fri, Sep 04, 2026 at 02:38:18PM +0800, Long Zhao via B4 Relay wrote:
> The Ambarella CV75 UART is Ambarella IP, not a Synopsys DesignWare
> licensed block. At the register level it is close enough to DW APB UART
> that a full custom UART driver is unnecessary: reuse 8250_dw with a
> small platform quirk.
>
> Quirks:
> - keep IER ETOI (bit 5) set for RX timeout behaviour
> - skip set_rate; baud clock is managed outside the UART block
Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
...
> +static int dw8250_ier_mask_startup(struct uart_port *p)
> +{
> + struct dw8250_data *d = to_dw8250_data(p->private_data);
> + struct uart_8250_port *up = up_to_u8250p(p);
> + int ret;
> +
> + ret = serial8250_do_startup(p);
> + if (ret)
> + return ret;
> +
> + /*
> + * Ambarella keeps variant IER bits (e.g. ETOI) set for correct RX
> + * timeout behaviour. Force them into the 8250 IER shadow so later
> + * generic IER updates do not clear them.
> + */
Wondering if we should undo this in the port's .shutdown() callback.
> + up->ier |= d->pdata->ier_mask;
> + serial_port_out(p, UART_IER, up->ier);
> +
> + return 0;
> +}
--
With Best Regards,
Andy Shevchenko