[PATCH 09/34] arm64: dts: qcom: sm8550: Fix PCIe wake GPIO polarity
From: Krishna Chaitanya Chundru
Date: Thu Sep 10 2026 - 09:45:18 EST
The PCIe WAKE# signal is active-low as defined in the PCIe Base
Specification. Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW
instead of GPIO_ACTIVE_HIGH.
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Reviewed-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 4 ++--
arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 2 +-
arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts | 2 +-
arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 2 +-
7 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
index ae301d78e071..aaf5eb57ce23 100644
--- a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
@@ -336,7 +336,7 @@ &mdss_dsi0_phy {
&pcie0 {
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
@@ -349,7 +349,7 @@ &pcie0_phy {
&pcie1 {
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts
index 9df8dcd6c62b..41b09ab43d0c 100644
--- a/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8550-rb5gen2.dts
@@ -1045,7 +1045,7 @@ &mdss_dp0 {
&pcie0 {
vddpe-3v3-supply = <&pcie_upd_3p3>;
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
@@ -1146,7 +1146,7 @@ pci@0,1 {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
index 82fb10ed6b6b..4777c908c4d7 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
@@ -1087,7 +1087,7 @@ &mdss_dp0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
@@ -1121,7 +1121,7 @@ &pcie0_phy {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 7c634572c6b7..eb1de33e5ba5 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -739,7 +739,7 @@ &mdss_dp0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -756,7 +756,7 @@ &pcie0_phy {
};
&pcie1 {
- wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index 473ec4e27daf..13cdb5b0ce40 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -987,7 +987,7 @@ &mdss_dp0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
diff --git a/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts b/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts
index 81c02ee27fe9..cf4e4e9d9e26 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts
@@ -510,7 +510,7 @@ &i2c_master_hub_0 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
index 367f6eae5e65..9f347bea6c74 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts
@@ -584,7 +584,7 @@ cirrus,gpio-ctrl2 {
};
&pcie0 {
- wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
--
2.34.1