Re: [PATCH v1 08/13] dt-bindings: iio: adc: adi,ad4134: Document SPI connection mode
From: Marcelo Schmitt
Date: Thu Sep 10 2026 - 18:18:21 EST
Hello Conor, sorry for delayed reply.
On 09/07, Conor Dooley wrote:
> On Fri, Sep 04, 2026 at 07:06:44PM -0300, Marcelo Schmitt wrote:
> > On 09/04, Marcelo Schmitt wrote:
> > > On 09/03, Conor Dooley wrote:
> > > > On Wed, Sep 02, 2026 at 02:24:02PM -0300, Marcelo Schmitt wrote:
> > > > > Document how AD4134 chips are connected to the host SPI controller
> > > > > according to different wiring configurations.
> > > > >
> > > > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@xxxxxxxxxx>
> > > > > ---
> > > > > .../bindings/iio/adc/adi,ad4134.yaml | 22 +++++++++++++++++++
> > > > > 1 file changed, 22 insertions(+)
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > > index ea6d7e026419..d843c02a394a 100644
> > > > > --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > > @@ -131,6 +131,28 @@ properties:
> > > > > enum: [ free-running, gated ]
> > > > > default: gated
> > > > >
> > > > > + adi,spi-mode:
> > > > > + $ref: /schemas/types.yaml#/definitions/string
> > > > > + enum: [ no-cs, 4-wire, one-channel-chain, two-channel-chain ]
> > > > > + description: |
> > > > > + This property indicates the SPI wiring configuration.
> > > > > +
> > > > > + When this property is omitted, it is assumed that the device is using
> > > > > + 'no-cs' wiring. When this property is present, it indicates that the
> > > > > + device is using one of the following wiring configurations:
> > > >
> > > ...
> > > > I'd also really appreciate a dts example for a system
> > > > with one-channel-chain or two-channel-chain looks, given the second
> > > > device may require different supplies etc. I have no impression in my
> > > > head of how the dt would be constructed, so I'd like to see wht you have
> > > > in mind.
> > >
> > ...
> >
> > Realized what I said doesn't make much sense. The peripherals can all have
> > the same configuration and thus share CS, SCLK, and controller SDO. The wiring
> > would be like the following
> >
> > ::
> >
> > +-----------------------+ +-----------------+
> > | AD4134 | | SPI Controller |
> > | | | |
> > | | | |
> > | SPI interface SCLK |<--------------------+---------| SCLK |
> > | for register CS |<--------------------|-+-------| CS |
> > | access SDI |<--------------------|-|-+-----| SDO |
> > | SDO |------->|¯¯¯¯\ | | | | |
> > | | |MUX >------|-|-|---->| SDI0 |
> > | Data interface DOUT0 |------->|____/<------|-|-|---- | GPIO |
> > | for ADC sample DOUT1 |---------------------|-|-|---->| SDI1 |
> > | data read DCLK |<-------------+------|-|-|-----| DCLK |
> > | DOUT2 |<-+ | | | | | |
> > | DOUT3 |<-|-+ | | | | | |
> > | ODR |<-|-|---------|--+ | | | +->| Offload Trigger |
> > +-----------------------+ | | | | | | | | +-----------------+
> > | | | | | | | +--| PWM1 |
> > | | | +---| | | ----| PWM0 |
> > | | | | | | | +-----------------+
> > | | | | | | |
> > +-----------------------+ | | | | | | |
> > | AD4134 | | | | | | | |
> > | | | | | | | | |
> > | SPI interface | | | | | | | |
> > | for register SCLK |<-|-|---------|--|---+ | |
> > | access CS |<-|-|---------|--|---|-+ |
> > | SDI |<-|-|---------|--|---|-|-+
> > | SDO | | | | | | | |
> > | Data interface | | | | | | | |
> > | for ADC sample DOUT0 |--+ | | | | | |
> > | data read DOUT1 |----+ | | | | |
> > | DOUT2 |<-+ | | | | |
> > | DOUT3 |<-|-+ | | | | |
> > | DCLK |<-|-|---------+ | | | |
> > | ODR |<-|-|---------|--+ | | |
> > +-----------------------+ | | | | | | |
> > | | | | | | |
> > | | | | | | |
> > | | | | | | |
> > +-----------------------+ | | | | | | |
> > | AD4134 | | | | | | | |
> > | | | | | | | | |
> > | | | | | | | | |
> > | SPI interface SCLK |<-|-|---------|--|---+ | |
> > | for register CS |<-|-|---------|--|-----+ |
> > | access SDI |<-|-|---------|--|-------+
> > | | | | | |
> > | Data interface | | | | |
> > | for ADC sample DOUT0 |--+ | | |
> > | data read DOUT1 |----+ | |
> > | DOUT2 | | |
> > | DOUT3 | | |
> > | DCLK |<-------------+ |
> > | ODR |<----------------+
> > +-----------------------+
> >
> >
> > So we would set them as only one daisy-chained device.
> >
> > spi {
> > ...
> > adc@0 {
> > compatible = "adi,ad4134";
> > reg = <0>;
> > spi-rx-bus-width = <1>, <1>; /* 2 lanes of 1 bit each */
> >
> > <supplies, clock, and other properties ...>
> >
> > #daisy-chained-devices = <2>;
>
> Does this property actually provide value here? I assume it does because
> otherwise you don't know how many devices there are.
Yes, the number of daisy-chained-devices is needed to determine how much data
to transfer on ADC sample read. We already have some documentation in
Documentation/devicetree/bindings/common-properties.txt
>
> > adi,spi-mode = "two-channel-chain";
>
> How does this interact with spi-rx-bus-width? Is the value of this
> consistent with adi,spi-mode? IOW, for adi,spi-mode = "one.." will there
> only ever be Dout0 connected to the host and for adi,spi-mode = "two.."
> will Dout1 and Dout0 both be connected?
For this particular ADC design, yes.
adi,spi-mode = "one-channel-chain" always expects spi-rx-bus-width = <1> (only DOUT0) and
adi,spi-mode = "two-channel-chain" always expects spi-rx-bus-width = <1>, <1> (DOUT0, DOOUT1).
Though, it is possible to have spi-rx-bus-width = <1> and
spi-rx-bus-width = <1>, <1> in non-chained setups.
Will make the constraints explicit on v2.
allOf:
...
- oneOf:
- required: [adi,spi-mode, '#daisy-chained-devices']
properties:
adi,spi-mode:
const: one-channel-chain
spi-rx-bus-width:
maxItems: 1
- required: [adi,spi-mode, '#daisy-chained-devices']
properties:
adi,spi-mode:
const: two-channel-chain
spi-rx-bus-width:
minItems: 2
maxItems: 2
- properties:
'#daisy-chained-devices': false
Best regards,
Marcelo