Re: [PATCH 00/34] arm64: dts: qcom: Move PCIe phy/GPIOs to root port nodes and fix wake-gpios polarity

[Manivannan Sadhasivam]

On Thu, Sep 10, 2026 at 06:58:49PM +0530, Krishna Chaitanya Chundru wrote:
> PCIe wake is active low signal as per the PCIe base spec, Several Qualcomm
> platform devicetrees incorrectly describe wake-gpios as GPIO_ACTIVE_HIGH.
> 
> The PCIe PHY references and PERST/WAKE GPIO properties are defined on a
> per-root-port basis and do not belong to the PCIe controller (RC)
> node. Keeping these properties at the controller level makes the
> description less accurate and prevents clean per-port customization.
> 
> This series moves the PHY references (phys, phy-names) from the PCIe
> controller node to the corresponding root port nodes (pcie@0), namely
> pcie0_port0, pcie1_port0, and pcie2_port0. Labels are added to these
> port nodes to enable board-level overrides where required.
> 
> Additionally, the PERST and WAKE GPIO properties are relocated from
> controller-level board overrides to their respective root port nodes
> in the board DTS files. As part of this change, 'perst-gpios' is renamed
> to 'reset-gpios' to align with the binding used in the PCIe root port
> context.
> 

Please split Root Port binding rework and WAKE# polarity fix to separate series.

- Mani

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