Re: [PATCH v7 06/17] iio: adc: ad7768: Validate master clock rate

[Andy Shevchenko]

On Thu, Sep 10, 2026 at 07:36:24PM +0200, Janani Sunil wrote:
> Reject master clock rates outside the limits specified by the device.
> External CMOS and LVDS clocks support 1.15 MHz to 34 MHz, while a
> crystal requires 8 MHz to 34 MHz.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxx>

-- 
With Best Regards,
Andy Shevchenko