[PATCH 1/3] dt-bindings: soundwire: qcom: describe multi-master
From: Srinivas Kandagatla
Date: Fri Sep 11 2026 - 04:28:46 EST
v3.1.0+ Qualcomm SoundWire IPs can be paired to expose one logical
bus with more than two DATA lanes. Add the two properties that
describe such a pair:
qcom,multi-master-mode role in the pair ("primary" or "dependent")
qcom,multi-master-peer <phandle, bus-port-offset> to the other IP
Both nodes carry both properties.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
---
.../bindings/soundwire/qcom,soundwire.yaml | 109 ++++++++++++++++--
1 file changed, 100 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml
index 8e6973fa229c..6cf3285ded92 100644
--- a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml
+++ b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml
@@ -215,6 +215,36 @@ properties:
maximum: 4
- const: 0xff
+ qcom,multi-master-mode:
+ description:
+ Role in v3.1.0+ multi-master mode. Both nodes set this; the
+ primary owns SWR_CLK, the dependent contributes DATA lanes
+ only.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ primary, dependent ]
+
+ qcom,multi-master-peer:
+ description:
+ Peers in multi-master mode. Each entry is a
+ <peer-phandle, bus-port-offset> pair. Peer N's DPn slots
+ 1, 2, 3, ... occupy bus ports (offset+1), (offset+2), ...
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: peer phandle
+ - description: bus port offset (last primary-local port)
+ minItems: 1
+
+ num-lanes:
+ description:
+ Number of DATA lanes this IP exposes locally. Required in
+ multi-master mode; on the primary it defines the boundary
+ between local bus lanes (0..num-lanes-1) and lanes contributed
+ by the dependent.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 8
+
label:
maxItems: 1
@@ -224,21 +254,82 @@ required:
- interrupts
- clocks
- clock-names
- - '#sound-dai-cells'
- '#address-cells'
- '#size-cells'
- - qcom,ports-offset1
- - qcom,ports-offset2
-
-oneOf:
- - required:
- - qcom,ports-sinterval-low
- - required:
- - qcom,ports-sinterval
allOf:
- $ref: soundwire-controller.yaml#
+ # Single-master (no qcom,multi-master-mode): needs port config.
+ - if:
+ not:
+ required:
+ - qcom,multi-master-mode
+ then:
+ required:
+ - '#sound-dai-cells'
+ - qcom,ports-offset1
+ - qcom,ports-offset2
+ oneOf:
+ - required:
+ - qcom,ports-sinterval-low
+ - required:
+ - qcom,ports-sinterval
+
+ # Multi-master primary: drives the bus, needs port config + MM props.
+ - if:
+ properties:
+ qcom,multi-master-mode:
+ const: primary
+ required:
+ - qcom,multi-master-mode
+ then:
+ properties:
+ compatible:
+ contains:
+ const: qcom,soundwire-v3.1.0
+ required:
+ - '#sound-dai-cells'
+ - qcom,ports-offset1
+ - qcom,ports-offset2
+ - qcom,multi-master-peer
+ - num-lanes
+ oneOf:
+ - required:
+ - qcom,ports-sinterval-low
+ - required:
+ - qcom,ports-sinterval
+
+ # Multi-master dependent: contributes DATA lanes
+ - if:
+ properties:
+ qcom,multi-master-mode:
+ const: dependent
+ required:
+ - qcom,multi-master-mode
+ then:
+ properties:
+ compatible:
+ contains:
+ const: qcom,soundwire-v3.1.0
+ '#sound-dai-cells': false
+ qcom,din-ports: false
+ qcom,dout-ports: false
+ qcom,ports-word-length: false
+ qcom,ports-sinterval-low: false
+ qcom,ports-sinterval: false
+ qcom,ports-offset1: false
+ qcom,ports-offset2: false
+ qcom,ports-lane-control: false
+ qcom,ports-block-pack-mode: false
+ qcom,ports-hstart: false
+ qcom,ports-hstop: false
+ qcom,ports-block-group-count: false
+ qcom,ports-ch-mask: false
+ required:
+ - qcom,multi-master-peer
+ - num-lanes
+
unevaluatedProperties: false
examples:
--
2.53.0