[PATCH RFC 08/10] drm/msm/dsi: make command and video mode configuration mutually exclusive
From: YİĞİTCAN KAVAKLI via B4 Relay
Date: Fri Sep 11 2026 - 05:03:41 EST
From: YİĞİTCAN KAVAKLI <kavakliyigitcan@xxxxxxxxx>
In dsi_op_mode_config(), entering video mode sets DSI_CTRL_VID_MODE_EN
without clearing DSI_CTRL_CMD_MODE_EN, and entering command mode sets
DSI_CTRL_CMD_MODE_EN without clearing DSI_CTRL_VID_MODE_EN.
Ensure explicit mutual exclusion by clearing the opposing enable bit
when switching operational modes to prevent hardware bus collisions.
Signed-off-by: YİĞİTCAN KAVAKLI <kavakliyigitcan@xxxxxxxxx>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 7e4e3718b536c92dc555de213042857379499447..b9e2867d435a3ad8b6db6b57c440bbd827180b6e 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1094,7 +1094,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
dsi_write(msm_host, REG_DSI_ACTIVE_HSYNC,
DSI_ACTIVE_HSYNC_START(hs_start) |
DSI_ACTIVE_HSYNC_END(hs_end));
- dsi_write(msm_host, REG_DSI_ACTIVE_VSYNC_HPOS, 0);
+ dsi_write(msm_host, REG_DSI_ACTIVE_VSYNC_HPOS,
+ DSI_ACTIVE_VSYNC_HPOS_START(hs_start) |
+ DSI_ACTIVE_VSYNC_HPOS_END(vs_end));
dsi_write(msm_host, REG_DSI_ACTIVE_VSYNC_VPOS,
DSI_ACTIVE_VSYNC_VPOS_START(vs_start) |
DSI_ACTIVE_VSYNC_VPOS_END(vs_end));
@@ -1168,8 +1170,10 @@ static void dsi_op_mode_config(struct msm_dsi_host *msm_host,
DSI_IRQ_MASK_VIDEO_DONE, 0);
} else {
if (video_mode) {
+ dsi_ctrl &= ~DSI_CTRL_CMD_MODE_EN;
dsi_ctrl |= DSI_CTRL_VID_MODE_EN;
} else { /* command mode */
+ dsi_ctrl &= ~DSI_CTRL_VID_MODE_EN;
dsi_ctrl |= DSI_CTRL_CMD_MODE_EN;
dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_CMD_MDP_DONE, 1);
}
--
2.47.3