[PATCH 02/10] arm64: dts: exynos: axis: Re-order properties to match coding style

From: Krzysztof Kozlowski

Date: Fri Sep 11 2026 - 06:24:42 EST


Re-order a few properties to match coding style, as pointed out by
dt-check-style, e.g.:

artpec8.dtsi:69: [property-order] property 'local-timer-stop' out of canonical order (should sort before 'arm,psci-suspend-param')
artpec8.dtsi:232: [property-order] property 'pinctrl-names' must be placed after 'pinctrl-0'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/axis/artpec8.dtsi | 4 ++--
arch/arm64/boot/dts/exynos/axis/artpec9.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
index 853b2fafc8d1..9cfaf4935dd4 100644
--- a/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
+++ b/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
@@ -81,11 +81,11 @@ idle-states {

cpu_sleep: cpu-sleep {
compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
+ arm,psci-suspend-param = <0x0010000>;
};
};
};
@@ -229,8 +229,8 @@ serial_0: serial@16cc0000 {
<&cmu_fsys CLK_GOUT_FSYS_UART0_SCLK_UART>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
pinctrl-0 = <&serial0_bus>;
+ pinctrl-names = "default";
};
};

diff --git a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
index 310cafa14f5c..a92af2ed13f9 100644
--- a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
+++ b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
@@ -98,11 +98,11 @@ idle-states {

cpu_sleep: cpu-sleep {
compatible = "arm,idle-state";
- arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
+ arm,psci-suspend-param = <0x0010000>;
};
};
};
@@ -261,8 +261,8 @@ serial_0: serial@14c70000 {
<&cmu_fsys1 CLK_GOUT_FSYS1_UART0_SCLK_UART>;
clock-names = "uart", "clk_uart_baud0";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
pinctrl-0 = <&serial0_bus>;
+ pinctrl-names = "default";
samsung,uart-fifosize = <64>;
};
};

--
2.53.0