Re: [PATCH v3] arm64: dts: altera: Move all SoCFPGA files to dts/altera
From: Chiam, Evon
Date: Fri Sep 11 2026 - 10:33:39 EST
Hi Dinh
On 11/9/2026 5:45 pm, Dinh Nguyen wrote:
I've split this change into a separate patch and sent it in v4:
On 9/10/26 09:16, evon.chiam@xxxxxxxxxx wrote:
From: "Chiam, Evon" <evon.chiam@xxxxxxxxxx>Please separate this change into a separate patch. Otherwise, LGTM.
The dts/intel/ directory contains two distinct families:
- Altera SoCFPGA platforms (Stratix 10, Agilex, Agilex5, Agilex72,
Agilex7M, N5X)
- Intel Keembay
All Altera SoCFPGA device trees already have a home in dts/altera/
(Stratix 10 has been there since the directory was introduced). Move
the remaining SoCFPGA DTS/DTSI files from dts/intel/ to dts/altera/
to consolidate all Altera SoCFPGA device trees under a single
directory. Only the Keembay files remain in dts/intel/.
Also drop the stale SoCFPGA MAINTAINERS path for
arch/arm64/boot/dts/intel/. Keembay DT files there remain covered
by ARM/INTEL KEEMBAY ARCHITECTURE
All inter-file includes are relative so no include paths need to
change. The set of DTBs produced by dtbs_install is unchanged; they
are simply built from dts/altera/ instead of dts/intel/.
No compatible strings or DTS/DTSI contents are modified; the device
tree move is rename-only.
Link: https://nam10.safelinks.protection.outlook.com/? url=https%3A%2F%2Flore.kernel.org%2Fall%2Fcd16fb78-551e-4630-83d6- a44a68e2e411%40kernel.org%2F&data=05%7C02%7Cevon.chiam%40altera.com%7Cdbebcf1cfb6d48efd95808df0fe96622%7Cfbd72e03d4a54110adce614d51f2077a%7C0%7C0%7C639247167296589037%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=YZT4tZ2b6W3InI1ubN1thEAmAkSy%2BdJXpya1Nknlkjc%3D&reserved=0
Signed-off-by: Chiam, Evon <evon.chiam@xxxxxxxxxx>
---
Changes in v3:
- Drop stale SoCFPGA MAINTAINERS F: entry for arch/arm64/boot/dts/intel/
Changes in v2:
- Reworded commit subject to drop redundant "device trees" and phrase
the move as "to dts/altera"
v1 patch link:
https://nam10.safelinks.protection.outlook.com/? url=https%3A%2F%2Flore.kernel.org%2Fall%2F802bf0d27fbff9b1ddb6b9fc323a1a9f8f050f74.1788512748.git.evon.chiam%40altera.com%2F&data=05%7C02%7Cevon.chiam%40altera.com%7Cdbebcf1cfb6d48efd95808df0fe96622%7Cfbd72e03d4a54110adce614d51f2077a%7C0%7C0%7C639247167296637660%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=vUgJ1yBU8%2FtFnCcXoP30XgamJOr1bhqrMNbqdt9BKTA%3D&reserved=0
MAINTAINERS | 1 -
arch/arm64/boot/dts/altera/Makefile | 14 +++++++++++++-
.../boot/dts/{intel => altera}/socfpga_agilex.dtsi | 0
.../{intel => altera}/socfpga_agilex3_socdk.dts | 0
.../dts/{intel => altera}/socfpga_agilex5.dtsi | 0
.../{intel => altera}/socfpga_agilex5_socdk.dts | 0
.../socfpga_agilex5_socdk_013b.dts | 0
.../socfpga_agilex5_socdk_modular.dts | 0
.../socfpga_agilex5_socdk_nand.dts | 0
.../dts/{intel => altera}/socfpga_agilex72.dtsi | 0
.../{intel => altera}/socfpga_agilex72_socdk.dts | 0
.../{intel => altera}/socfpga_agilex7m_socdk.dts | 0
.../dts/{intel => altera}/socfpga_agilex_n6000.dts | 0
.../dts/{intel => altera}/socfpga_agilex_socdk.dts | 0
.../socfpga_agilex_socdk_emmc.dts | 0
.../socfpga_agilex_socdk_nand.dts | 0
.../dts/{intel => altera}/socfpga_n5x_socdk.dts | 0
arch/arm64/boot/dts/intel/Makefile | 12 ------------
18 files changed, 13 insertions(+), 14 deletions(-)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex.dtsi (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex3_socdk.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex5.dtsi (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex5_socdk.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex5_socdk_013b.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex5_socdk_modular.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex5_socdk_nand.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_agilex72.dtsi (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex72_socdk.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex7m_socdk.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex_n6000.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex_socdk.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex_socdk_emmc.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/ socfpga_agilex_socdk_nand.dts (100%)
rename arch/arm64/boot/dts/{intel => altera}/socfpga_n5x_socdk.dts (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 15011f5752a9..98f374ae7586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3590,7 +3590,6 @@ F: arch/arm/boot/dts/intel/socfpga/
F: arch/arm/configs/socfpga_defconfig
F: arch/arm/mach-socfpga/
F: arch/arm64/boot/dts/altera/
-F: arch/arm64/boot/dts/intel/
https://lore.kernel.org/all/cover.1789123511.git.evon.chiam@xxxxxxxxxx/
Dinh
Thanks and regards,
Evon