Re: [PATCH] dmaengine: fsl_raid: byte-swap cdb32 when programming CDBs

[Frank Li]

On Thu, Sep 10, 2026 at 12:43:24PM -0700, Rosen Penev wrote:
> The three prep functions write the first word of the command descriptor
> block (cdb32) with a plain u32 assignment, while every other CDB/CF
> descriptor field is written with cpu_to_be32(). The RAID Engine expects
> big-endian descriptors, so the plain assignment produces a corrupted CDB
> on little-endian hosts. Use cpu_to_be32() for cdb32 to match the
> surrounding code.
>
> Fixes: ad80da658bbc ("dmaengine: Driver support for FSL RaidEngine device.")
> Assisted-by: opencode:big-pickle
> Signed-off-by: Rosen Penev <rosenp@xxxxxxxxx>
> ---

Reviewed-by: Frank Li <Frank.Li@xxxxxxx>

>  drivers/dma/fsl_raid.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/fsl_raid.c b/drivers/dma/fsl_raid.c
> index befb4bb69d54..9cc289f7129e 100644
> --- a/drivers/dma/fsl_raid.c
> +++ b/drivers/dma/fsl_raid.c
> @@ -361,7 +361,7 @@ static struct dma_async_tx_descriptor *fsl_re_prep_dma_genq(
>  	cdb |= FSL_RE_INTR_ON_ERROR << FSL_RE_CDB_ERROR_SHIFT;
>  	cdb |= FSL_RE_DATA_DEP << FSL_RE_CDB_DEPEND_SHIFT;
>  	xor = desc->cdb_addr;
> -	xor->cdb32 = cdb;
> +	xor->cdb32 = cpu_to_be32(cdb);
>
>  	if (scf) {
>  		/* compute q = src0*coef0^src1*coef1^..., * is GF(8) mult */
> @@ -481,7 +481,7 @@ static struct dma_async_tx_descriptor *fsl_re_prep_dma_pq(
>  	cdb |= FSL_RE_DATA_DEP << FSL_RE_CDB_DEPEND_SHIFT;
>
>  	pq = desc->cdb_addr;
> -	pq->cdb32 = cdb;
> +	pq->cdb32 = cpu_to_be32(cdb);
>
>  	p = pq->gfm_q1;
>  	/* Init gfm_q1[] */
> @@ -564,7 +564,7 @@ static struct dma_async_tx_descriptor *fsl_re_prep_dma_memcpy(
>  	cdb |= FSL_RE_DATA_DEP << FSL_RE_CDB_DEPEND_SHIFT;
>
>  	move = desc->cdb_addr;
> -	move->cdb32 = cdb;
> +	move->cdb32 = cpu_to_be32(cdb);
>
>  	/* Filling frame 0 of CFD with move CDB */
>  	cf = desc->cf_addr;
> --
> 2.55.0
>