Re: [PATCH bpf-next v2 2/2] bpf, mips: Add support for BPF_MOVSX in the JITs

[Johan Almbladh]

Hi Nicholas,

Thank you for the updated patch set. It looks good, with one remark below.

> Use shift pairs rather than seb/seh so the lowering works on every CPU
> supported by these JITs. seb/seh would save one instruction on
> R2-or-newer CPUs but would require adding those opcodes to uasm.

I would suggest that we do this optimization. There are other examples
where the JIT can use fewer instructions on newer ISA revisions, for
example BPF_MUL (emitted as mul vs multu+mflo). You can add the
missing opcodes to your previous uasm patch. Then add ISA-specific
handling in the BPF_MOV emittors, in the same way as it is done in
BPF_MUL for example. When you have the full patch set, I can run
through test_bpf on all my QEMU mips targets.

Thanks,
Johan