[PATCH RFC v1 7/8] x86/microcode/intel: Support uniform scope for early loading

[Chang S. Bae]

The parallel bringup facility queries whether the architecture provides a
custom set of primary CPUs. Extend x86 hooks with the Intel-specific
logic so that the primary CPU selection matches the uniform loading
scope.

Signed-off-by: Chang S. Bae <chang.seok.bae@xxxxxxxxx>
---
 arch/x86/kernel/cpu/microcode/core.c     |  9 +++
 arch/x86/kernel/cpu/microcode/intel.c    | 70 ++++++++++++++++++++++++
 arch/x86/kernel/cpu/microcode/internal.h |  4 ++
 3 files changed, 83 insertions(+)

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index dfa311a2edbd..ed547f2b4601 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -906,14 +906,23 @@ static int mc_cpu_down_prep(unsigned int cpu)
 /*
  * Queried by the parallel bringup code to determine whether x86 provides a
  * custom primary CPU mask for early loading.
+ *
+ * Uniform loading scope is Intel-specific, so let the vendor code determine the
+ * primary CPU selection.
  */
 bool __init arch_cpuhp_primary_aware(void)
 {
+	if (x86_cpuid_vendor() == X86_VENDOR_INTEL)
+		return intel_primary_aware();
+
 	return __max_threads_per_core > 1;
 }
 
 const struct cpumask *__init arch_cpuhp_get_primary_cpus(void)
 {
+	if (x86_cpuid_vendor() == X86_VENDOR_INTEL)
+		return intel_get_primary_cpus();
+
 	return cpu_primary_thread_mask;
 }
 
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 4b5feee14712..6178bddb7f60 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -989,6 +989,76 @@ static __init bool staging_available(void)
 	return !!(val & MCU_STAGING);
 }
 
+bool __init intel_primary_aware(void)
+{
+	if (!microcode_intel_ops.use_uniform)
+		return __max_threads_per_core > 1;
+
+	switch (microcode_intel_ops.uniform_scope) {
+	case UNIFORM_SYS:
+		/*
+		 * The boot CPU performs the update for the entire system. But,
+		 * returning false would fall back to the SMT primary mask.
+		 * Return true to indicate the primary CPU clearly.
+		 */
+		return true;
+	case UNIFORM_PKG:
+		/* One primary core per package participates. */
+		return true;
+	case UNIFORM_DEFAULT:
+	case UNIFORM_CORE:
+		/*
+		 * Fallback to the legacy per-core loading, where the primary
+		 * CPU distinction matters only when SMT is on.
+		 */
+		break;
+	default:
+		/* Unknown scopes fall back to the legacy per-core scope. */
+		WARN_ON_ONCE(1);
+	}
+
+	return __max_threads_per_core > 1;
+}
+
+static struct cpumask primary_cpus __initdata;
+
+static void __init set_primary_cpus(void)
+{
+	if (!microcode_intel_ops.use_uniform) {
+		cpumask_copy(&primary_cpus, cpu_primary_thread_mask);
+		return;
+	}
+
+	switch (microcode_intel_ops.uniform_scope) {
+	case UNIFORM_SYS:
+		/*
+		 * CPU0 is guaranteed to be online and acts as the system
+		 * primary.
+		 */
+		cpumask_set_cpu(0, &primary_cpus);
+		break;
+	case UNIFORM_PKG:
+		/* One CPU per package is sufficient. */
+		cpumask_and(&primary_cpus, cpu_primary_core_mask, cpu_primary_thread_mask);
+		break;
+	case UNIFORM_DEFAULT:
+	case UNIFORM_CORE:
+	default:
+		cpumask_copy(&primary_cpus, cpu_primary_thread_mask);
+	}
+}
+
+/*
+ * The bringup code may query the mask more than once. Compute it on first use.
+ */
+const struct cpumask *__init intel_get_primary_cpus(void)
+{
+	if (cpumask_empty(&primary_cpus))
+		set_primary_cpus();
+
+	return &primary_cpus;
+}
+
 struct microcode_ops * __init init_intel_microcode(void)
 {
 	struct cpuinfo_x86 *c = &boot_cpu_data;
diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
index 0a74794e0245..0552d66f4012 100644
--- a/arch/x86/kernel/cpu/microcode/internal.h
+++ b/arch/x86/kernel/cpu/microcode/internal.h
@@ -128,11 +128,15 @@ static inline void exit_amd_microcode(void) { }
 void load_ucode_intel_bsp(struct early_load_data *ed);
 void load_ucode_intel_ap(void);
 void reload_ucode_intel(void);
+bool intel_primary_aware(void);
+const struct cpumask *intel_get_primary_cpus(void);
 struct microcode_ops *init_intel_microcode(void);
 #else /* CONFIG_CPU_SUP_INTEL */
 static inline void load_ucode_intel_bsp(struct early_load_data *ed) { }
 static inline void load_ucode_intel_ap(void) { }
 static inline void reload_ucode_intel(void) { }
+static inline bool intel_primary_aware(void) { return false; }
+static inline const struct cpumask *intel_get_primary_cpus(void) { return cpu_none_mask; }
 static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
 #endif  /* !CONFIG_CPU_SUP_INTEL */
 
-- 
2.53.0