Re: [PATCH bpf-next v3 2/2] bpf, mips: Add support for BPF_MOVSX in the JITs

[Nicholas Dudar]

> The changelog describes a silent miscompilation of already-loadable BPF
> programs, which indicates this is a bug fix. Should this include a Fixes:
> tag pointing to the commit that introduced BPF_MOVSX to the instruction
> set?

This adds MOVSX support that the MIPS JITs have not previously
implemented. I classified it as architecture enablement and targeted
bpf-next on that basis. The incorrect ordinary-MOV lowering described
in the changelog is real.

This distinction was discussed during the RV32 MOVSX review. Pu Lehui
explicitly requested an "Add support" title and removal of the same
Fixes: 8100928c8814 tag, treating the change as added JIT support:

https://lore.kernel.org/bpf/2ca2a85a-d4a9-4459-a534-6159de6e5890@xxxxxxxxxx/

> Does this compile? The MIPS uasm assembler appears to have no seb/seh
> emitter.

Yes, with the prerequisite declared in the cover letter. Patch 2/3 of
SDIV/SMOD v4 adds the uasm declarations, encodings and emitters for
seb/seh:

https://lore.kernel.org/bpf/20260911213340.3767930-3-main.kalliope@xxxxxxxxx/

The MOVSX cover letter links that series and includes its prerequisite
patch IDs. Applying MOVSX without it leaves those emitters undefined.

I built the combined stack and ran test_bpf under QEMU Malta on
little-endian MIPS32 R1/R2/R6 and MIPS64 R2/R6. All five MOVSX cases
passed with the JIT on each profile and all 16 signed DIV/MOD cases also
passed.

Nicholas