Re: [PATCH v2] phy: cadence: Sierra: Do not modify register when getting parent clock

[Vinod Koul]

On Fri, 06 Mar 2026 11:23:58 +0100, Gregory CLEMENT wrote:
> The get_parent() callback for the PLL_CMNLC1 clock was incorrectly
> writing to the register while determining the parent clock index. This
> unintended register access forces the PHY back into training mode. If
> the PHY is already configured, this unexpected change prevents it from
> exiting training mode.
> 
> Remove the register write operation to ensure the PHY remains stable
> during the get_parent() callback.
> 
> [...]

Applied, thanks!

[1/1] phy: cadence: Sierra: Do not modify register when getting parent clock
      commit: 02613aa974ccc84a5448573d253275baace95124

Best regards,
-- 
~Vinod