RE: [RESEND v22 0/3] Add OpenCores PTC PWM support
From: Hal Feng
Date: Sun Sep 13 2026 - 23:04:37 EST
> On 26.09.08 03:07, Maud Spierings wrote:
> Hello Hal,
>
> Thanks for picking up this series, I've tested it on my fml13v01 board in the
> framework 13 chassis. Seeing the pwms split out into seperate nodes is how I
> envisioned this driver too.
>
> Now to figure out how to get the pwm backlight driver to work nicely with an
> inverted pwm.
>
> Tested-by: Maud Spierings <maud_spierings@xxxxxxxxxxx>
Thanks for your attention and testing.
To work with the pwm backlight driver, add the PWM_POLARITY_INVERTED flag to
the device tree.
Best regards,
Hal
>
> > Add OpenCores PTC PWM driver which is used in StarFive
> > JH7100/JH7110/JHB100 SoC.
> >
> > I will maintain this pwm module in place of William.
> >
> > Changes since v21:
> > - Allow non-zero duty cycles shorter than one clock tick to round down to
> > zero.
> > - Drop the .free() callback to preserve the PWM hardware state after
> > pwm_put().
> > - Update the comment.
> >
> > Changes since v20:
> > - Fix 0% duty cycle support.
> >
> > Changes since v19:
> > - Drop the oneOf construct in dt-bindings.
> > - Address Sashiko AI review comments for the OpenCores PWM driver.
> > In ocores_pwm_apply(), handling disable requests first, then calculating
> > and validating period/duty for enable requests before taking a runtime
> > PM reference or touching the hardware registers.
> >
> > Changes since v18:
> > - Address Sashiko AI review comments for the OpenCores PWM driver.
> > - Fix runtime PM usage count handling on probe, error paths, PWM release
> > and driver teardown.
> > - Reject period or duty cycle values below the hardware minimum.
> > - Restore PWM registers across system sleep resume.
> > - Return the real error from devm_pwmchip_alloc().
> > - Preserve bootloader-configured PWM state during probe and keep
> runtime
> > PM active if the PWM is already enabled.
> > - Use synchronous runtime PM put before possible teardown.
> >
> > Changes since v17:
> > - Simplify the code. Make it more readable.
> > - Restructure the driver to register the pwm chip for one pwm channel,
> > because each OpenCores PTC IP core only supports one PWM channel.
> > Drop starfive compatibles.
> > Add patches to fix the dt-bindings and device tree.
> > - Support runtime pm and system sleep pm.
> > - Disable the pwm module and reset the pwm counter before updating the
> > period and duty cycle.
> > - Improve the descriptions.
> > - Update the dt-bindings maintainer to Hal Feng.
> >
> > History:
> > v21:
> > https://lore.kernel.org/all/20260701074442.7714-1-hal.feng@starfivetec
> > h.com/
> > v20:
> > https://lore.kernel.org/all/20260629063601.63917-1-hal.feng@starfivete
> > ch.com/
> > v19:
> > https://lore.kernel.org/all/20260615155759.129210-1-hal.feng@starfivet
> > ech.com/
> > v18:
> > https://lore.kernel.org/all/20260515054723.25024-1-hal.feng@starfivete
> > ch.com/
> > v17:
> > https://lore.kernel.org/all/20250106103540.10079-1-william.qiu@starfiv
> > etech.com/
> >
> > Hal Feng (3):
> > dt-bindings: pwm: opencores: Update compatibles, examples and
> > maintainers
> > riscv: dts: starfive: Correct pwm nodes
> > pwm: Add OpenCores PTC PWM driver
> >
> > .../bindings/pwm/opencores,pwm.yaml | 6 +-
> > MAINTAINERS | 6 +
> > .../boot/dts/starfive/jh7100-common.dtsi | 28 +-
> > arch/riscv/boot/dts/starfive/jh7100.dtsi | 67 +++-
> > .../boot/dts/starfive/jh7110-common.dtsi | 27 +-
> > .../boot/dts/starfive/jh7110-milkv-mars.dts | 6 +-
> > .../dts/starfive/jh7110-milkv-marscm.dtsi | 6 +-
> > .../dts/starfive/jh7110-pine64-star64.dts | 6 +-
> > .../jh7110-starfive-visionfive-2-lite.dtsi | 6 +-
> > .../jh7110-starfive-visionfive-2.dtsi | 6 +-
> > arch/riscv/boot/dts/starfive/jh7110.dtsi | 67 +++-
> > drivers/pwm/Kconfig | 12 +
> > drivers/pwm/Makefile | 1 +
> > drivers/pwm/pwm-ocores.c | 298
> ++++++++++++++++++
> > 14 files changed, 518 insertions(+), 24 deletions(-) create mode
> > 100644 drivers/pwm/pwm-ocores.c
> >
> >
> > base-commit: db2ddb87143519e20a95aa36c60b36107b736a58
> > --
> > 2.43.2