[PATCH 21/31] arm64: dts: qcom: lemans: Add domain idle state names

From: Maulik Shah

Date: Mon Sep 14 2026 - 03:09:18 EST


Add the idle-state-name property for the domain idle states so low power
modes are described consistently and their names are printed in pmdomain
debugfs.

While at it, update the CPU idle state name to match the low power mode
it describes.

Use a big CPU idle state label for the shared CPU idle state, since all
eight CPUs use it.

Signed-off-by: Maulik Shah <maulik.shah@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 695eae1b7256..09e6138d2990 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -297,9 +297,9 @@ core3 {
idle-states {
entry-method = "psci";

- gold_rail_cpu_sleep_0: cpu-sleep-0 {
+ big_cpu_sleep_0: cpu-sleep-0 {
compatible = "arm,idle-state";
- idle-state-name = "gold-rail-power-collapse";
+ idle-state-name = "gold-pll-pc";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <702>;
exit-latency-us = <1061>;
@@ -311,6 +311,7 @@ gold_rail_cpu_sleep_0: cpu-sleep-0 {
domain-idle-states {
cluster_sleep_gold: cluster-sleep-0 {
compatible = "domain-idle-state";
+ idle-state-name = "l3-pc";
arm,psci-suspend-param = <0x41000044>;
entry-latency-us = <2752>;
exit-latency-us = <3048>;
@@ -319,6 +320,7 @@ cluster_sleep_gold: cluster-sleep-0 {

cluster_sleep_apss_rsc_pc: cluster-sleep-1 {
compatible = "domain-idle-state";
+ idle-state-name = "rsc-pc";
arm,psci-suspend-param = <0x42000144>;
entry-latency-us = <3263>;
exit-latency-us = <6562>;
@@ -557,49 +559,49 @@ psci {
cpu_pd0: power-domain-cpu0 {
#power-domain-cells = <0>;
power-domains = <&cluster_0_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
power-domains = <&cluster_0_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd2: power-domain-cpu2 {
#power-domain-cells = <0>;
power-domains = <&cluster_0_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd3: power-domain-cpu3 {
#power-domain-cells = <0>;
power-domains = <&cluster_0_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd4: power-domain-cpu4 {
#power-domain-cells = <0>;
power-domains = <&cluster_1_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd5: power-domain-cpu5 {
#power-domain-cells = <0>;
power-domains = <&cluster_1_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd6: power-domain-cpu6 {
#power-domain-cells = <0>;
power-domains = <&cluster_1_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cpu_pd7: power-domain-cpu7 {
#power-domain-cells = <0>;
power-domains = <&cluster_1_pd>;
- domain-idle-states = <&gold_rail_cpu_sleep_0>;
+ domain-idle-states = <&big_cpu_sleep_0>;
};

cluster_0_pd: power-domain-cluster0 {

--
2.43.0