Re: [PATCH] mmc: fix typos in comments

[Ulf Hansson]

On Mon, Sep 7, 2026 at 8:46 AM Hemanth Selam <hemanth.selam@xxxxxxxxx> wrote:
>
> Fix typos in comments, reported by scripts/checkpatch.pl using the
> misspelling list in scripts/spelling.txt.  Only touches comments, no code
> changes.
>
> Assisted-by: Cursor:claude-opus-5
> Signed-off-by: Hemanth Selam <hemanth.selam@xxxxxxxxx>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  drivers/memstick/core/ms_block.c  | 2 +-
>  drivers/memstick/host/r592.c      | 2 +-
>  drivers/mmc/core/block.c          | 2 +-
>  drivers/mmc/core/core.c           | 2 +-
>  drivers/mmc/core/mmc.c            | 2 +-
>  drivers/mmc/host/bcm2835.c        | 2 +-
>  drivers/mmc/host/dw_mmc.h         | 2 +-
>  drivers/mmc/host/mvsdio.c         | 2 +-
>  drivers/mmc/host/sdhci-msm.c      | 2 +-
>  drivers/mmc/host/sdhci-of-esdhc.c | 2 +-
>  drivers/mmc/host/sdhci-omap.c     | 2 +-
>  drivers/mmc/host/sdhci.h          | 2 +-
>  12 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/memstick/core/ms_block.c b/drivers/memstick/core/ms_block.c
> index ce33907bfc24..e2bf563ccbe1 100644
> --- a/drivers/memstick/core/ms_block.c
> +++ b/drivers/memstick/core/ms_block.c
> @@ -720,7 +720,7 @@ static int h_msb_parallel_switch(struct memstick_dev *card,
>
>  static int msb_switch_to_parallel(struct msb_data *msb);
>
> -/* Reset the card, to guard against hw errors beeing treated as bad blocks */
> +/* Reset the card, to guard against hw errors being treated as bad blocks */
>  static int msb_reset(struct msb_data *msb, bool full)
>  {
>
> diff --git a/drivers/memstick/host/r592.c b/drivers/memstick/host/r592.c
> index 605b2265536f..dc3de63901be 100644
> --- a/drivers/memstick/host/r592.c
> +++ b/drivers/memstick/host/r592.c
> @@ -289,7 +289,7 @@ static int r592_transfer_fifo_dma(struct r592_device *dev)
>         dev->dma_error = 0;
>         reinit_completion(&dev->dma_done);
>
> -       /* TODO: hidden assumption about nenth beeing always 1 */
> +       /* TODO: hidden assumption about nenth being always 1 */
>         sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
>                               DMA_TO_DEVICE : DMA_FROM_DEVICE);
>
> diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
> index e760d13ee325..a02bb2fee874 100644
> --- a/drivers/mmc/core/block.c
> +++ b/drivers/mmc/core/block.c
> @@ -86,7 +86,7 @@ MODULE_ALIAS("mmc:block");
>  static DEFINE_MUTEX(block_mutex);
>
>  /*
> - * The defaults come from config options but can be overriden by module
> + * The defaults come from config options but can be overridden by module
>   * or bootarg options.
>   */
>  static int perdev_minors = CONFIG_MMC_BLOCK_MINORS;
> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
> index 29e80e5f928e..08d41f0996de 100644
> --- a/drivers/mmc/core/core.c
> +++ b/drivers/mmc/core/core.c
> @@ -2004,7 +2004,7 @@ unsigned int mmc_calc_max_discard(struct mmc_card *card)
>
>         /*
>          * Without erase_group_def set, MMC erase timeout depends on clock
> -        * frequence which can change.  In that case, the best choice is
> +        * frequency which can change.  In that case, the best choice is
>          * just the preferred erase size.
>          */
>         if (mmc_card_mmc(card) && !(card->ext_csd.erase_group_def & 1))
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 05444ecf3909..a02b04938e1a 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1015,7 +1015,7 @@ static void mmc_set_bus_speed(struct mmc_card *card)
>  }
>
>  /*
> - * Select the bus width amoung 4-bit and 8-bit(SDR).
> + * Select the bus width among 4-bit and 8-bit(SDR).
>   * If the bus width is changed successfully, return the selected width value.
>   * Zero is returned instead of error value if the wide width is not supported.
>   */
> diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c
> index c949a3eaae79..efd1903c3ccd 100644
> --- a/drivers/mmc/host/bcm2835.c
> +++ b/drivers/mmc/host/bcm2835.c
> @@ -1095,7 +1095,7 @@ static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock)
>         int div;
>
>         /* The SDCDIV register has 11 bits, and holds (div - 2).  But
> -        * in data mode the max is 50MHz wihout a minimum, and only
> +        * in data mode the max is 50MHz without a minimum, and only
>          * the bottom 3 bits are used. Since the switch over is
>          * automatic (unless we have marked the card as slow...),
>          * chosen values have to make sense in both modes.  Ident mode
> diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
> index 38610c89d54a..d500a419e2cf 100644
> --- a/drivers/mmc/host/dw_mmc.h
> +++ b/drivers/mmc/host/dw_mmc.h
> @@ -69,7 +69,7 @@ struct dw_mci_dma_slave {
>   * @cmd: The command currently being sent to the card, or NULL.
>   * @data: The data currently being transferred, or NULL if no data
>   *     transfer is in progress.
> - * @stop_abort: The command currently prepared for stoping transfer.
> + * @stop_abort: The command currently prepared for stopping transfer.
>   * @prev_blksz: The former transfer blksz record.
>   * @timing: Record of current ios timing.
>   * @use_dma: Which DMA channel is in use for the current transfer, zero
> diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
> index cf705b265e21..7d86426c6001 100644
> --- a/drivers/mmc/host/mvsdio.c
> +++ b/drivers/mmc/host/mvsdio.c
> @@ -717,7 +717,7 @@ static int mvsd_probe(struct platform_device *pdev)
>         /*
>          * Some non-DT platforms do not pass a clock, and the clock
>          * frequency is passed through platform_data. On DT platforms,
> -        * a clock must always be passed, even if there is no gatable
> +        * a clock must always be passed, even if there is no gateable
>          * clock associated to the SDIO interface (it can simply be a
>          * fixed rate clock).
>          */
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 4aff965f0e2e..b229545d9db5 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -1770,7 +1770,7 @@ static void sdhci_msm_handle_pwr_irq(struct sdhci_host *host, int irq)
>
>         /*
>          * The driver has to acknowledge the interrupt, switch voltages and
> -        * report back if it succeded or not to this register. The voltage
> +        * report back if it succeeded or not to this register. The voltage
>          * switches are handled by the sdhci core, so just report success.
>          */
>         msm_host_writel(msm_host, irq_ack, host,
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
> index 8345e2c5a034..1ca3562d8f73 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -1381,7 +1381,7 @@ static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host)
>         if (!IS_ERR(clk)) {
>                 /*
>                  * esdhc->peripheral_clock would be assigned with a value
> -                * which is eSDHC base clock when use periperal clock.
> +                * which is eSDHC base clock when use peripheral clock.
>                  * For some platforms, the clock value got by common clk
>                  * API is peripheral clock while the eSDHC base clock is
>                  * 1/2 peripheral clock.
> diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c
> index b5d7c1a80a92..7a198fb26628 100644
> --- a/drivers/mmc/host/sdhci-omap.c
> +++ b/drivers/mmc/host/sdhci-omap.c
> @@ -332,7 +332,7 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode)
>         u32 reg;
>         int i;
>
> -       /* clock tuning is not needed for upto 52MHz */
> +       /* clock tuning is not needed for up to 52MHz */
>         if (ios->clock <= 52000000)
>                 return 0;
>
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index f0fd81409a86..98c1fe20bfcd 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -409,7 +409,7 @@ struct sdhci_adma2_64_desc {
>  #define SDHCI_MAX_MRQS         2
>
>  /*
> - * 48bit command and 136 bit response in 100KHz clock could take upto 2.48ms.
> + * 48bit command and 136 bit response in 100KHz clock could take up to 2.48ms.
>   * However since the start time of the command, the time between
>   * command and response, and the time between response and start of data is
>   * not known, set the command transfer time to 10ms.
> --
> 2.48.1
>