Re: [PATCH v4] mtd: spi-nor: Fix quad-enable for flashes with QER bit in SR1
From: Michael Walle
Date: Mon Sep 14 2026 - 12:59:15 EST
On Fri, 11 Sep 2026 19:22:45 +0200, Miquel Raynal wrote:
> Some flashes (eg. from Macronix) do set BFPT_DWORD15_QER_SR1_BIT6, which
> means they do not have an SR2 to read from/write to. The new generic QE
> helper was supposed to accommodate this situation but in the last version
> that got merged, parts of that specific handling has been moved to a
> more contained location, swp.c (which needed most of the extra code),
> yet the Macronix case has been forgotten about in that generic QE
> handling helper. Booting with such flashes will always fail probing.
>
> [...]
Applied, thanks!
[1/1] mtd: spi-nor: Fix quad-enable for flashes with QER bit in SR1
commit: 90f242c92d3ab241f0d22e2368b57750b8755667
Best regards,
--
Michael Walle <mwalle@xxxxxxxxxx>