[PATCH v5 0/2] ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

[Prasanth Kumar Padarthi]

Add device tree support for the ASRock Rack B650D4U BMC, which is
based on the ASPEED AST2600 SoC.

The series adds the board compatible and describes the BMC memory,
SPI NOR flash layout, UART console, GPIO line names, graphics
reserved memory, I2C EEPROM, and MAC0 connected to an RTL8211F
Ethernet PHY.

MAC0 uses the EEPROM on I2C7 as the NVMEM provider for its MAC
address and is configured to use the RTL8211F in RGMII-ID mode.

Changes in v5:
- Use the I2C7 EEPROM as the NVMEM provider for the MAC0 address.
- Configure MAC0 to use the RTL8211F in RGMII-ID mode.
- Use the standard OpenBMC 64 MiB flash layout.
- Add confirmed GPIO line names for the reset button and host power
  control.
- Add the reusable 16 MiB reserved-memory pool used by the graphics
  device.
- Drop the previous RX-delay-specific description.

Changes in v4:
- Validate the MAC0 RGMII timing configuration on B650D4U hardware.
- Keep phy-mode = "rgmii-rxid" based on hardware A/B testing.
- Add the SPI NOR fixed partition layout validated on B650D4U
  hardware.
- Correct the BMC memory size to 512 MiB.
- Order peripheral nodes alphabetically by label.

Prasanth Kumar Padarthi (2):
  dt-bindings: arm: aspeed: Add ASRock Rack B650D4U
  ARM: dts: aspeed: Add ASRock Rack B650D4U BMC

 .../bindings/arm/aspeed/aspeed.yaml           |   1 +
 arch/arm/boot/dts/aspeed/Makefile             |   1 +
 .../dts/aspeed/aspeed-bmc-asrock-b650d4u.dts  | 120 ++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-b650d4u.dts


base-commit: fcf94f5431858d83003cf18d60df67bd87b20ad2
-- 
2.47.3