Re: [PATCH v2 1/2] dt-bindings: soc: xilinx: Document ifm ZynqMP VHIP6 EvalBoard

[Marek Vasut]

On 9/14/26 8:29 AM, Michal Simek wrote:

[...]
> > > > > There will be thousands of similar boards out there and I am 
> > > > > definitely not going to have all of them in the tree.
> > > > Why not ? There are users who benefit from having their board 
> > > > support upstream. This is what other SoC vendors do as well, it does 
> > > > not seem to be a problem, rather it is a good indicator that the SoC 
> > > > has users who care about it and about upstream.
> > >
> > > If there is public documentation about it I don't have any problem 
> > > with it.
> >
> > I do not think there is, but no public documentation is the case with 
> > many boards/DTs that are upstream, and it does not diminish their 
> > usefulness to their users.
> >
> > What do you need to know ?
>
> All these SOC based boards are created not because of hard block (PS 
> part) but because of programmable logic which is not described in any 
> upstream project DT. It means no matter what manufacturer has to 
> maintain PL description separately.
>
> I don't really mind if other maintainers are fine with dealing with 
> these kind of boards without any public documentation. There is no way 
> to check if even your description is correct.
> I am not going to take any responsibility for maintaining them.
I can help with maintaining this board, it's a non-issue.