Re: [PATCHv2] gpio: mvebu: keep resume masks within the irqchip cache

From: Sebastian Andrzej Siewior

Date: Tue Sep 15 2026 - 02:44:04 EST


On 2026-09-14 17:44:06 [-0700], Rosen Penev wrote:
> mvebu_gpio_resume() writes the edge/level mask registers saved at
> suspend time straight back to hardware, bypassing the irqchip's
> mask_cache_priv. genirq skips mask_irq() for a line it already
> considers masked, so restoring a bit in hardware that genirq thinks
> is still masked leaves that line unmasked behind genirq's back. An
> asserted level line then has nobody to ack it, and the moment
> interrupts are re-enabled the chained handler storms, hanging resume.

Why is the mask value changed after suspend?

Sebastian