[PATCH v7 8/9] arm64: dts: qcom: shikra: Add OPE node

From: Loic Poulain

Date: Tue Sep 15 2026 - 04:17:07 EST


From: Nihal Kumar Gupta <nihal.gupta@xxxxxxxxxxxxxxxx>

Add the Offline Processing Engine (OPE) device tree node for Shikra.
The node describes the six register regions (cdm, top, qos, pipeline,
bus_read, bus_write), clocks, interrupt, interconnects, IOMMU mappings,
and OPP table.

OPE is a memory-to-memory block with no board-level dependencies, so
the node is left enabled for all Shikra boards.

Signed-off-by: Nihal Kumar Gupta <nihal.gupta@xxxxxxxxxxxxxxxx>
Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/shikra.dtsi | 77 ++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 92d22e3b6931cf49f213d1807f78fc1a261f290d..5adc28e9aa64508366e6c7fdad191a152b8cb6dc 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -1828,6 +1828,83 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
};
};

+ isp_ope: isp@5c42000 {
+ compatible = "qcom,shikra-camss-ope", "qcom,qcm2290-camss-ope";
+
+ reg = <0x0 0x5c42000 0x0 0x400>,
+ <0x0 0x5c42400 0x0 0x200>,
+ <0x0 0x5c42600 0x0 0x200>,
+ <0x0 0x5c42800 0x0 0x4400>,
+ <0x0 0x5c46c00 0x0 0x190>,
+ <0x0 0x5c46d90 0x0 0xa00>;
+ reg-names = "cdm",
+ "top",
+ "qos",
+ "pipeline",
+ "bus_read",
+ "bus_write";
+
+ clocks = <&gcc GCC_CAMSS_AXI_CLK>,
+ <&gcc GCC_CAMSS_OPE_CLK>,
+ <&gcc GCC_CAMSS_OPE_AHB_CLK>,
+ <&gcc GCC_CAMSS_NRT_AXI_CLK>,
+ <&gcc GCC_CAMSS_TOP_AHB_CLK>;
+ clock-names = "axi",
+ "core",
+ "iface",
+ "nrt",
+ "top";
+
+ interrupts = <GIC_SPI 209 IRQ_TYPE_EDGE_RISING 0>;
+
+ interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG
+ &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>,
+ <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG
+ &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>;
+ interconnect-names = "config",
+ "data";
+
+ iommus = <&apps_smmu 0x600 0x0>,
+ <&apps_smmu 0x620 0x0>,
+ <&apps_smmu 0x640 0x0>;
+
+ operating-points-v2 = <&ope_opp_table>;
+ power-domains = <&gcc GCC_CAMSS_TOP_GDSC>,
+ <&rpmpd RPMPD_VDDCX>;
+ power-domain-names = "camss",
+ "cx";
+
+ ope_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmpd_opp_min_svs>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+
+ opp-266600000 {
+ opp-hz = /bits/ 64 <266600000>;
+ required-opps = <&rpmpd_opp_svs_plus>;
+ };
+
+ opp-465000000 {
+ opp-hz = /bits/ 64 <465000000>;
+ required-opps = <&rpmpd_opp_nom>;
+ };
+
+ opp-580000000 {
+ opp-hz = /bits/ 64 <580000000>;
+ required-opps = <&rpmpd_opp_turbo>;
+ turbo-mode;
+ };
+ };
+ };
+
remoteproc_mpss: remoteproc@6080000 {
compatible = "qcom,shikra-mpss-pas";
reg = <0x0 0x06080000 0x0 0x100>;

--
2.34.1