Re: [PATCH v2 4/6] ASoC: qcom: lpass-rx-macro: Add shikra compatible

[Mohammad Rafi Shaik]

On 9/14/2026 5:11 PM, Srinivas Kandagatla wrote:
> On 9/10/26 10:46 AM, Mohammad Rafi Shaik wrote:
> > Add shikra RX macro compatible data and hook it into the existing
> > LPASS codec v4.1 flow.
> >
> > The RX macro register layout of LPASS codec v4.1 matches the v2.5+
> > layout, so reuse the existing v2.5 register access helpers, controls
> > and widgets for it.
> >
> > v4.1 additionally requires the FS counter to be bypassed before it is
> > enabled during MCLK enable. This is a property of the codec version and
> > not of the board, so key it off the version detected by the VA macro
> > rather than off match data.
> >
> > Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@xxxxxxxxxxxxxxxx>
> > ---
> >   sound/soc/codecs/lpass-rx-macro.c | 17 +++++++++++++++++
> >   1 file changed, 17 insertions(+)
> >
> > diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c
> > index 2e74ec1a5..83372123c 100644
> > --- a/sound/soc/codecs/lpass-rx-macro.c
> > +++ b/sound/soc/codecs/lpass-rx-macro.c
> > @@ -60,6 +60,7 @@
> >   #define CDC_RX_FS_MCLK_CNT_ENABLE	BIT(0)
> >   #define CDC_RX_FS_MCLK_CNT_CLR_MASK	BIT(1)
> >   #define CDC_RX_FS_MCLK_CNT_CLR		BIT(1)
> > +#define CDC_RX_FS_CNT_BYPASS		BIT(7)
> >   #define CDC_RX_CLK_RST_CTRL_SWR_CONTROL	(0x0108)
> >   #define CDC_RX_SWR_CLK_EN_MASK		BIT(0)
> >   #define CDC_RX_SWR_RESET_MASK		BIT(1)
> > @@ -1613,6 +1614,7 @@ static bool rx_is_rw_register(struct device *dev, unsigned int reg)
> >   	case LPASS_CODEC_VERSION_2_6:
> >   	case LPASS_CODEC_VERSION_2_7:
> >   	case LPASS_CODEC_VERSION_2_8:
> > +	case LPASS_CODEC_VERSION_4_1:
> >   		return rx_2_5_is_rw_register(dev, reg);
> >   	default:
> >   		break;
> > @@ -2045,6 +2047,16 @@ static int rx_macro_mclk_enable(struct rx_macro *rx, bool mclk_enable)
> >   					   CDC_RX_CLK_MCLK2_ENABLE);
> >   			regmap_update_bits(regmap, CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
> >   					   CDC_RX_FS_MCLK_CNT_CLR_MASK, 0x00);
> > +
> > +			/*
> > +			 * From LPASS codec v4.1 onwards the FS counter has to be
> > +			 * bypassed before it is enabled, otherwise the fsgen
> > +			 * output does not come up.
> > +			 */
> > +			if (rx->codec_version >= LPASS_CODEC_VERSION_4_1)
> this pattern match is fragile,
>
> > +				regmap_set_bits(regmap, CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
> > +						CDC_RX_FS_CNT_BYPASS);
>
> Please use this as a flag.

Ack,

Will introduce a flag or switch-case mechanism to handle this configuration.

Best Regards,
Rafi.

> > +
> >   			regmap_update_bits(regmap, CDC_RX_CLK_RST_CTRL_FS_CNT_CONTROL,
> >   					   CDC_RX_FS_MCLK_CNT_EN_MASK,
> >   					   CDC_RX_FS_MCLK_CNT_ENABLE);
> > @@ -3652,6 +3664,7 @@ static int rx_macro_component_probe(struct snd_soc_component *component)
> >   	case LPASS_CODEC_VERSION_2_6:
> >   	case LPASS_CODEC_VERSION_2_7:
> >   	case LPASS_CODEC_VERSION_2_8:
> > +	case LPASS_CODEC_VERSION_4_1:
> >   		controls = rx_macro_2_5_snd_controls;
> >   		num_controls = ARRAY_SIZE(rx_macro_2_5_snd_controls);
> >   		widgets = rx_macro_2_5_dapm_widgets;
> > @@ -3837,6 +3850,7 @@ static int rx_macro_probe(struct platform_device *pdev)
> >   	case LPASS_CODEC_VERSION_2_6:
> >   	case LPASS_CODEC_VERSION_2_7:
> >   	case LPASS_CODEC_VERSION_2_8:
> > +	case LPASS_CODEC_VERSION_4_1:
> >   		rx->rxn_reg_stride = 0xc0;
> >   		rx->rxn_reg_stride2 = 0x0;
> >   		def_count = ARRAY_SIZE(rx_defaults) + ARRAY_SIZE(rx_2_5_defaults);
> > @@ -3949,6 +3963,9 @@ static const struct of_device_id rx_macro_dt_match[] = {
> >   	}, {
> >   		.compatible = "qcom,sc8280xp-lpass-rx-macro",
> >   		.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
> > +	}, {
> > +		.compatible = "qcom,shikra-lpass-rx-macro",
> > +		.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
> >   	},
> >   	{ }
> >   };