Re: [PATCH] drm/amdgpu: check ras and obj before dereference

[Alex Deucher]

Applied.  Thanks!

Alex

On Mon, Sep 14, 2026 at 11:15 PM Zhou1, Tao <Tao.Zhou1@xxxxxxx> wrote:
>
> AMD General
>
> Reviewed-by: Tao Zhou <tao.zhou1@xxxxxxx>
>
> > -----Original Message-----
> > From: Dmitriy Chumachenko <Dmitry.Chumachenko@xxxxxxxxxxxxxxx>
> > Sent: Monday, September 14, 2026 10:33 PM
> > To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> > Cc: Koenig, Christian <Christian.Koenig@xxxxxxx>; David Airlie <airlied@xxxxxxxx>;
> > Daniel Vetter <daniel@xxxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>;
> > Zhou1, Tao <Tao.Zhou1@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx; dri-
> > devel@xxxxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; lvc-
> > project@xxxxxxxxxxxxxxxx; Dmitriy Chumachenko
> > <Dmitry.Chumachenko@xxxxxxxxxxxxxxx>
> > Subject: [PATCH] drm/amdgpu: check ras and obj before dereference
> >
> > [Some people who received this message don't often get email from
> > dmitry.chumachenko@xxxxxxxxxxxxxxx. Learn why this is important at
> > https://aka.ms/LearnAboutSenderIdentification ]
> >
> > nbio_v7_9_handle_ras_controller_intr_no_bifring() dereferences ras and obj without
> > checking either for NULL. Both amdgpu_ras_get_context() and
> > amdgpu_ras_find_obj() can return NULL, e.g. during the window between
> > adev->nbio.ras being set (early in amdgpu_ras_init(), by design, to
> > enable the fatal-error interrupt as soon as possible) and the PCIE_BIF ras object
> > actually being created in RAS late_init. Any interrupt in that window crashes in hard-
> > IRQ context.
> >
> > This is analogous to commit d190b459b2a4 ("drm/amdgpu: the warning
> > dereferencing obj for nbio_v7_4"), which fixed the same issue in the
> > nbio_v7_4 handler.
> >
> > Found by Linux Verification Center (linuxtesting.org) with SVACE.
> >
> > Fixes: 7692e1ee2446 ("drm/amdgpu: add RAS fatal error handler for NBIO v7.9")
> > Signed-off-by: Dmitriy Chumachenko <Dmitry.Chumachenko@xxxxxxxxxxxxxxx>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> > b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> > index 8e401f8b2a05..2b3a1b9f8efc 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> > @@ -518,7 +518,7 @@ static void
> > nbio_v7_9_handle_ras_controller_intr_no_bifring(struct amdgpu_device
> >                                                 RAS_CNTLR_INTERRUPT_CLEAR, 1);
> >                 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL,
> > bif_doorbell_intr_cntl);
> >
> > -               if (!ras->disable_ras_err_cnt_harvest) {
> > +               if (ras && !ras->disable_ras_err_cnt_harvest && obj) {
> >                         /*
> >                          * clear error status after ras_controller_intr
> >                          * according to hw team and count ue number
> > --
> > 2.49.0
>