Re: [PATCH v1 1/2] dmaengine: dw-edma: Macro order as per reg bit position
From: Frank Li
Date: Tue Sep 15 2026 - 12:51:23 EST
On Mon, Sep 07, 2026 at 04:24:52PM +0530, Devendra K Verma wrote:
> For a register the macros providing masks for bit ranges.
> These macros if placed in order provide good view of the bits.
> Placed macros in ascending order.
dmaengine: dw-edma: sort register field macros by bit position
Sort register field macros by bit position to improve readability.
No functional change intended.
Frank
>
> Signed-off-by: Devendra K Verma <devverma@xxxxxxx>
> ---
> drivers/dma/dw-edma/dw-edma-pcie.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 9f237ba916de..006dea7d6322 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> @@ -31,8 +31,8 @@
>
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_ID 0x6
> #define DW_PCIE_XILINX_MDB_VSEC_ID 0x20
> -#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR GENMASK(10, 8)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_MAP GENMASK(2, 0)
> +#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR GENMASK(10, 8)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_WR_CH GENMASK(9, 0)
> #define DW_PCIE_XILINX_MDB_VSEC_DMA_RD_CH GENMASK(25, 16)
>
> --
> 2.43.0
>